TPCE636 User Manual Issue 1.0.2
Page 13 of 104
4 PCI Device Topology
The TPCE636 consists of two FPGAs. Both FPGAs are designed as PCIe / PCI endpoint devices. One
FPGA is the User FPGA (Kintex-7) which can be programmed with user defined FPGA code. The second
FPGA takes control of on-board hardware functions of TPCE636 and also the configuration control of the
User FPGA. This second FPGA is the BCC (Board Configuration Controller).
The BCC PCI endpoint is connected via a PCI-to-PCIe Bridge to the second x1 Downstream Port of the
PCIe Switch (Pericom PI7C9X2G312GP). The User FPGA (Kintex-7 PCIe endpoint) is directly connected to
the first x4 Downstream Port.
The x4 Upstream Port of the PCIe Switch is connected to the XMC P15 Connector, communicating with the
host system.
P15
XC7KxxxT-2
PCIe-to-PCI Bridge
x4 PCIe
x1 PCIe
x4 PCIe
PI7C9X2G312GP
XIO2001
LCMXO2
User FPGA
Board Configuration
Controller (FPGA)
Figure 4-1 : PCIe/PCI Device Topology
Device
Vendor ID
Device ID
Class
Code
Description (as shown by lspci)
PI7C9X2G312GP
0x12D8
(Pericom)
0x2312
0x060400 PCI bridge:
0x04h to indicate device as PCI-to-PCI Bridge
0x06h to indicate device as Bridge device
XIO2001
0x104C
(Texas
Instruments)
0x8240
0x060400 PCI bridge: Texas Instruments
0x04h to indicate device as PCI-to-PCI Bridge
0x06h to indicate device as Bridge device
XC7KxxxT-2
user defined
Device identification for the User
programmable FPGA is defined by user. The
data will be created with the Xilinx Vivado “7
Series Integrated Block for PCI Express” IP
generator.
BCC
LCMXO2
0x1498
(TEWS)
0x727c
0x068000 Bridge Device: TEWS Technologies GmbH
Device 927E
(TPCE636).
Table 4-1 : On-Board PCIe / PCI Devices
