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Taylor Electronics Services 

www.tayloredge.com

C  2009

Specifications: 1381/1383 Clock Timer Controller

F

ig

 9:  13

81 V

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 m

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schemat

ic

 (R

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ences e

xcept for

 the co

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r ar

e the sa

me fo

r bot

h versi

o

n

s

)

2008

DR

A

WN

C

H

EC

KED

EN

G

IN

E

ER

PR

O

J E

N

G

IN

E

ER

AP

PR

O

VED

QA

A

PPRO

V

AL

S

D

A

T

E

SI

Z

E

B

SC

AL

E

NO

N

E

SH

EE

T

DR

A

W

IN

G

 NO

.

R

E

V

.

F

S

CM

 NO

.

11

OF

TI

TL

E

S

m

ar

tN

ix

ie

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lee

p C

o

n

tr

o

lle

r

J T

A

Y

L

O

R

200

8/

04

/2

0

-

13

81

.D

S

N

A

PPRO

V

ED

DAT

E

REV

D

ESCRI

PT

IO

N

REV

ISI

O

N

 HI

ST

O

R

Y

NO

T

E

S

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E

S

S

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HE

RW

IS

E

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P

E

CI

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D

c

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lor

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tr

o

n

ic

s

Se

rv

ic

e

s

3.

94V

9

8

7

6

5

4

3

2

1

10

11

12

P1

GN

D

VD

D

A0

/D

T

A1

/C

K

EN

A

B

L

E

N/

C

SC

L

SD

A

VD

D

GN

D

GN

D

VD

D

R1

10

0K

Po

w

e

r

1

2

3

4

5

6

IC

S

P

 C

o

n

n

e

c

tio

n

+5

V

GN

D

LV

P

CL

O

C

K

DAT

A

GN

D

+5

V

VPP

IC

S

P

V

DDS

W

GN

D

9V

IN

9V

O

U

T

A1

N/

C

SD

A

VD

D

9V

O

U

T

GND

A0

EN

A

B

L

E

GND

SC

L

9V

IN

VD

DS

W

1

3

5

7

9

11

12

10

8

6

4

2

R2

2.

2

K

R3

2.

2K

VD

D

S

W

VD

D

1

RA

5

/T

1

C

K

I/

O

S

C1

/C

L

K

IN

2

RA

4

/A

N

3

/T

1

G

/O

S

C2

/C

L

K

O

U

T

3

R

A

3/

M

C

LR

/V

P

P

4

RC

5

5

RC

4

/C

2

O

U

T

6

R

C

3

/A

N

7

/C

1

2

IN

3

-

7

R

C

6

/AN

8

/SS

8

R

C

7

/A

N

9

/S

D

O

9

RB

7

10

R

B

6

/SC

K/

S

C

L

11

RB

5

/A

N

1

1

12

R

B

4

/A

N

10/

S

D

I/S

D

A

13

R

C

2

/A

N

6

/C

1

2

IN

2

-

14

R

C

1

/A

N

5

/C

1

2

IN

1

-

15

RC0

/A

N4

/C

2

IN

+

16

RA

2

/A

N

2

/T

0

CK

I/

INT

/C

1

O

UT

17

RA

1

/A

N

1

/C1

2

IN0

-/

V

R

E

F

/I

CS

P

C

L

K

18

R

A

0

/A

N

0

/C

1

IN

+/

IC

S

P

D

A

T

/U

L

P

W

U

19

VSS

20

U1

P

IC1

6F

677

GN

D

Y1

32

.7

68

K

H

z

C2

33P

F

C3

33

P

F

Q1

BSS1

3

8

Q2

BS

S1

3

8

GN

D

GND

4

6

5

1

2

3

Q3

F

DC6

40P

4

6

5

1

2

3

Q4

F

D

C

6

40P

VD

D

V

DDS

W

9V

S

W

9V

IN

9V

S

W

9V

IN

VI

N

1

BY

P

3

VO

U

T

5

FB

4

GN

D

2

U2

LT

17

61

E

S

5

-B

Y

P

R4

1M

R5

4

53K

GN

D

GN

D

C4

10

uF

/16V

C5

10

uF

/16V

GN

D

GN

D

9V

IN

DU

RA

T

IO

N

IN

T

E

R

V

A

L

R N

1:A

R N

1:B

R N

1:C

R N

1 :D

R N

2:A

R N

2:B

R N

2:C

R N

2 :D

4

0

8

C

2

1

3

6

5

7

A

B

9

E

F

D

C1

2

4

3

2

4

1

1

8

6

C2

5

SW

1

P

3

6S

10

3(

6

)

4

0

8

C

2

1

3

6

5

7

A

B

9

E

F

D

C1

2

4

3

2

4

1

1

8

6

C2

5

SW

2

P

3

6S

10

3(

6

)

R6

100K

R7

100K

2

4

6

8

10

12

S

w

it

c

h

e

s

 on oppos

it

e

 s

ide

Содержание 1381

Страница 1: ... of hours module updates along with the other display modules the current time When the timer module prepares to power down the clock it uses the last updated time information to compute the delay until the next display interval The timer counts down this delay using a very low power oscillator current consumption of the entire timer module in this Waiting mode is less than 50uA at 9V input Since ...

Страница 2: ...10 minutes 12 minutes 15 minutes 20 minutes 30 minutes 60 minutes Always on 1381 Vertical timer module 1383 Horizontal timer module Interval Duration Interval Duration Table 1 Interval switch settings Fig 3 Module switch locations Fig 2 Application schematic 1381 1383 module Battery 3 to 12V 12V Abs Max 9VIN ENABLE GND 9VOUT VDDOUT SDA GND SCL SmartNixie Clock HVPS SDA SCL GND VDD HVIN 330uF 16V I...

Страница 3: ...t any particular input voltage or ambient temperature Fig 5 Interval timing diagram Interval Setting C example 9VOUT VDDOUT 250mS Wake Duration Seconds 12 20 Duration Seconds 250mS Duration Seconds Duration Seconds 12 40 Interval 20 minutes See Table 1 The following applies for interval selections from 1 to E 1 to 14 The hour is split into even units based on the selected interval switch setting a...

Страница 4: ...com C 2009 Specifications 1381 1383 Clock Timer Controller 1 3 5 7 9 2 4 6 8 10 12 11 Switches A0 1PPS ENABLE A1 N C SCL SDA Top View GND VDDSW 9VIN VDD GND 9VOUT Fig 6 1381 Vertical timer module parts placement Fig 7 1381 Connector signal names ...

Страница 5: ...tronics Services www tayloredge com C 2009 Specifications 1381 1383 Clock Timer Controller A0 1PPS A1 ENABLE SDA SCL GND VDDSW VDD 9VOUT 9VIN Fig 8 1383 Horizontal module parts placement and connector signal names ...

Страница 6: ...9VIN VDDSW 1 3 5 7 9 11 12 10 8 6 4 2 R2 2 2K R3 2 2K V DD SW VD D 1 RA5 T1C KI O SC1 CLK IN 2 RA4 AN 3 T1G O SC2 CLKO U T 3 RA3 MCLR VP P 4 R C5 5 R C4 C2OUT 6 RC3 AN 7 C12IN 3 7 RC6 AN8 SS 8 RC7 AN9 SD O 9 RB7 10 RB6 SC K SC L 11 RB5 AN11 12 RB4 AN 10 SDI SD A 13 RC2 AN 6 C12IN 2 14 RC1 AN 5 C12IN 1 15 RC0 AN4 C 2IN 16 RA2 AN2 T 0CKI INT C1O UT 17 RA1 AN 1 C12IN0 VREF ICS PCLK 18 RA0 AN 0 C1IN I...

Страница 7: ...dia PWB holes Provide clearance on user PWB from other signals around pins as indicated 0 100 dia typical Some signals are exposed on underside use caution for placement of unmasked copper on user PWB 0 950 0 200 Nom 0 062 Nom 0 250 Max 0 000 0 100 Nom 0 300 Nom 0 0 0 155 0 570 0 000 0 495 0 650 0 800 0 075 0 175 0 275 0 375 0 475 0 575 0 025 Sq pins 10 plcs use 0 042 dia PWB holes 0 0 0 715 0 375...

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