ME310G1 Hardware Design Guide
1VV0301588 Rev. 16
Page 42 of 95
2021-10-27
Not Subject to NDA
5.7.2
SPI
The Telit ME310G1 module is provided by a standard 3-wire SPI master or slave interface
with chip select control.
The following are the available signals:
PAD
Signal
I/O
Function
Type
NOTE
AA5
SPI_MOSI
I/O
SPI MOSI
CMOS 1.8V
Y8
SPI_MISO
I/O
SPI MISO
CMOS 1.8V
AA7
SPI_CLK
I/O
SPI Clock
CMOS 1.8V
Y6
SPI_CS
I/O
SPI Chip Select
CMOS 1.8V
Table 28: Available signals
Note: The SPI interface is supported by the Telit AppZone API
’
s.
5.7.3
Serial Ports
The Telit ME310G1 module is includes 3 Asynchronous serial ports:
•
Asynchronous Serial Port (USIF0)
•
Asynchronous Serial Port (USIF1)*
•
Auxiliary Serial Port
You may design various serial port configurations on the OEM hardware.
The common are designs are:
•
RS232 PC com port
•
Microcontroller UART @ 1.8V (Universal Asynchronous Receive Transmit)
•
Microcontroller UART @ 5V or other voltages different from 1.8V
Depending on the serial port type on the OEM hardware, a level translator circuit may be
required to operate the system. The serial port on the module is CMOS 1.8.
Note: *The USIF1 is currently NOT supported by ME310G1 firmware.