Teledyne EV71YC1MCL2010-BA0, Руководство пользователя

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The CameraLink standard requires a minimum of 256 Pixels per channel. Then for the versatile model and
the lowest definitions, some combination sensor Mode / Output mode are not available. The following
table details the possible combinations :
Modes 4096 2048 1024 512
Base 1 Channel 8 Bits 1 x 2048 1 x 2048 1 x 1024 1 x 512
Base 1 Channel 10bits 1 x 2048 1 x 2048 1 x 1024 1 x 512
Base 1 Channel 12 Bits 1 x 2048 1 x 2048 1 x 1024 1 x 512
Base 2 Channels 8 Bits 2 x 2048 2 x 1024 2 x 512 2 x 256
Base 2 Channels 10bits 2 x 2048 2 x 1024 2 x 512 2 x 256
Base 2 Channels 12 Bits 2 x 2048 2 x 1024 2 x 512 2 x 256
Medium 4 Channels 8bits 4 x 1024 4 x 512 4 x 256 NA
Medium 4 Channels 10 bits 4 x 1024 4 x 512 4 x 256 NA
Medium 4 Channels 12bits 4 x 1024 4 x 512 4 x 256 NA
Full 8 Channels 8bits 8 x 512 8 x 256 NA NA
Full+ 10 Channels 8bits
(*)
10 x 409 NA NA NA
(*) Last 2 pixels ignored.
The table of the
appendix 10 chapter 10.2
gives the max speed achievable for each of these combinations in
addition with the combination of the Output Data Frequency.

Test Image Selector ( TestImageSelector ) : Defines if the data comes from the Sensor or the FPGA
(test Pattern). This command is available in the CommCam “Image Format” section :

Read function (ASCII): “ r srce ”;
Returned by the camera : “0” if Source from the Sensor and “1 to 5” if test pattern active

Write function (ASCII): “ w srce ” <value> :

“0” : To switch to CCD sensor image

“1” : Grey Horizontal Ramp (Fixed) : See AppendixA

“2” : White Pattern (Uniform white image : 255 in 8Bits or 4095 in 12bits)

“3” : Grey Pattern (Uniform middle Grey : 128 in 8bits or 2048 in 12 bits)

“4” : Black Pattern (Uniform black : 0 in both 8 and 12 bits)

“5” : Grey vertical Ramp (moving)
The test pattern is generated in the FPGA : It’s used to point out any interface problem with the Frame
Grabber.
When any of the Test pattern is enabled, the whole processing chain of the FPGA is disabled.