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Hardware Installation

To use this interposer:

1.

Set the SW1 DIP switches to the desired clock selection.

Note:

 "HOST_CLK" should be the default setting unless you are using an external clock reference source.

2.

Move the stand off from the default position to the position required by the DUT.

3.

Install the M.2 SSD device under test (DUT) into the connector on the interposer as shown (will fit 30 mm, 42mm, 
60mm, 80mm and 110mm).

4.

Connect the Summit Analyzer to the interposer using the high speed serial cables (If using Summit T54 use Gen4 Y 
cable PE021UCA-X. If using Summit T54 with Gen4 Phy use Gen4 straight cable PE020UCA-X).

5.

Connect the analyzer to a host machine using the USB port on the front panel of the Summit analyzer.

6.

If not already done, install the PCIe Protocol Analysis on the host machine.

7.

Connect 12V DC using the AC adapter supplied with the interposer. (Make sure that the AC adapter is powered on).

8.

Power On the Analyzer and wait for it to be recognized by the application. 

Note

: If prompted to update the firmware 

please do that before proceeding.

9.

Start recording with the analyzer.

10. Power on the host machine.

11. Launch the Teledyne LeCroy software application to monitor, record and view PCI Express traffic passing through the 

M.2 Interposer.

12. Power on the system under test.

Note:

 Step 8, 9, and 10 are needed in this order for "Power ON" traces.

Note:

 Use the link width control button SW2 to match the minimum physical lane width of the host and device.

Summit T54

Analyzer

PCI Express Gen4 M.2 MKey Interposer CrossSync Phy Interposer Interconnection Overview

Gen4 x4 Straight

Cable PE020UCA-X

12V DC from Adapter

475mm (18.7")
(not to scale)

Note:

 M/B-M Type Interposer is shown below. 

Host Slot Connector

Power Cable

High Speed 
Cable

Sideband 
Cable

Clock Source Configuration: SW2

External Clock Inputs

DUT Power LED Status: SW4

Active Width Control: SW3

Device Under Test (DUT)

Carrier board 
compatible with:

22x30, 22x42, 
22x60, 22x80 & 
22x110

Side Band Test Points

Interposer Configurations

Part No

Connector 

Key

Slot Key

         Designed For

     B            M         B-M

PE186UIA-X

M-Key

M-Key

No

Yes

Yes

5

Содержание PCI Express Gen4 M.2

Страница 1: ...other non storage devices Socket 3 keyed as M is strictly for high performance storage offering x4 lanes of bandwidth in this form factor In some cases a B M keyed SSD will also be available and it is...

Страница 2: ...tach and secure the Teledyne LeCroy M 2 interposer cable on the host system which usually supports different M 2 card form factors Follow below instructions to install the extension brackets that will...

Страница 3: ...ble soldered to the top of the PCB was removed in the drawing below for clarity 5 Insert the Extension bracket with the clip into the PCB with cables attached Ensure that the alignment pins on the bra...

Страница 4: ...nt bracket follow below procedure The Teledyne LeCroy M 2 Interposer Extension Bracket Kit contains the items listed below The items are shown in the figure below Type 22110 Extension bracket Type 228...

Страница 5: ...er 5 The view from the top side of the PCB is shown below The text Type 2280 is clearly visible Attaching the Cables to the Interposer 1 Once the cable assembly has been completed Method One or Method...

Страница 6: ...22110 Move the M 2 standoff based on the DUT Type The standoff will be attached to 2280 location by default The DUT is secured by a thumbscrew on the top side and a standoff with a locknut on the bot...

Страница 7: ...it for it to be recognized by the application Note If prompted to update the firmware please do that before proceeding 9 Start recording with the analyzer 10 Power on the host machine 11 Launch the Te...

Страница 8: ...to the next active width as indicated by the LEDs next to the switch on the interposer DUT Power LED Status on Interposer SW4 This switch connects the DUT power indication LEDs to the bus power In so...

Страница 9: ...F Protocol Analyzer US Clock Cable A Side Band Test Point Header J6207 Connector Pin Number Signal Name Connector Pin Number Signal Name 1 No Connection 17 VIO_CFG_HDR 2 No Connection 18 No Connection...

Страница 10: ...sis software and MAUI oscilloscope software optional Signal Name PE210UIA X PE210UIA X 1PHY PE210UIA X 2PHY PE210UIA X 4PHY Pin Headers CLK_32KHZ SUSCLK X X X X DAS DSS LED_1 X X X X ALERT IN X X X X...

Страница 11: ...erential probe with ProLink interface DH08 PL 13 GHz differential probe with ProLink interface DH13 PL 16 GHz differential probe with ProLink interface DH16 PL 20 GHz differential probe with ProLink i...

Страница 12: ...d Top View 2 Locate the PCIe Express pairs probe points as located on the left and right sides of the interposer Left Side View Right Side View Buffered Refclk Copy UMC Pin Header for Sideband Signals...

Страница 13: ...nnect the oscilloscope probes to the PCI express signals as shown in the figure below Connect each Oscilloscope Probe to the Required PCIe Bus Signal Interposer Ready for a Scope Analysis of a PCIe x2...

Страница 14: ...emarks of Teledyne LeCroy All other trademarks are property of their respective companies Changes Product specifications are subject to change without notice Teledyne LeCroy reserves the right to revi...

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