Clock Configuration and Other Switch Settings
SW1:
A pushbutton SW1 is used to turn off the terminations and remove all loads on the unused interposer receivers
depending on the maximum number of lanes to be analyzed. Press the pushbutton switch (SW3) to move to the next active
width as indicated by the LEDs (next to the switch on the interposer.
SW2
: The source for the reference clock used by the analyzer to record PCI Express traffic is configurable according to
below table for SW2. Make sure clock source in Recording Options in the PCIe Protocol Analysis application is set to
External.
Note:
Factory default is host clock: SW2.1 = OFF, SW2.2 = OFF, SW2.3 = OFF, SW2.4 = ON
Note:
Other switch configurations (other than those shown in the table above) are invalid.
Note:
External input clocks can be HCSL, LVPECL, LVDS or any single ended standard input voltage amplitude not to
exceed 800mV.
SW3:
This switch connects the DUT power indication LEDs to the bus power. In some systems with Hot-Plug management
the Power Indication LEDs on the interposer may prevent the host system from turning ON bus power to the device, if this
happens disconnect the LEDs using SW3 to allow proper bus power operation.
DUT Power LED Status on Interposer
SW2: Clock Source Control
SW2.1
SW2.2
SW2.3
SW2.4
Reference Clock Source
for Downstream Analysis
Reference Clock Source
for Upstream Analysis
OFF
OFF
OFF
ON
Host System PCIe Slot
Host System PCIe Slot
OFF
ON
OFF
OFF
US_CLK from MMCX connector
Host System PCIe Slot
OFF
OFF
ON
OFF
Host System PCIe Slot
DS_CLK from MMCX connector
ON
OFF
OFF
OFF
US_CLK from MMCX connector
DS_CLK from MMCX connector
SW3: DUT Power Status LED
ON
LED Connected (Default)
OFF
LED Disconnected
6
SW3 DUT Power LED
SW1 Active Link Width Select
