Tektronix 7D14, Инструкция по эксплуатации

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Circuit Description —7D14
collector level goes HI to provide a HI-level time-slot out­
put.
Zero-Cancel Logic
The Zero-Cancel Logic stage provides logic level outputs
during time-slots TS-3, TS-4, TS-5, and TS-6. A HI level
output during any one of these four time-slots encodes the
Readout Encoding circuit for a SPACE instruction. A LO
level output allows the Readout Encoding circuit to encode
the output for the decimal digit called for by the BCD
inputs.
A logic diagram of the Zero-Cancel Logic stage is shown
in Fig. 3-11. The logic components are grouped according
to the display digit which is directly affected by the
corresponding Zero-Cancel Logic stage output. An input/
output table for each digit-group is shown in Fig. 3-12.
READOUT ENCODING CIRCUIT
General
A discussion entitled Introduction to the Readout
System following the 7D14 Circuit Description gives a brief
description of the readout system used in Tektronix
7000-Series Oscilloscopes. Refer to this description for
more information on operation of the readout system.
Inputs
Outputs
8th-Digit BCD OVERFLOW
8th-Digit Zero-Cancel
a>
LO
LO
1-9
LO
Zero Hl
HI
7th-Digit BCD 8th-Digit Zero
7th-Digit Zero-Cancel
U> HI
LO
Zero
LO HI
1-9 <t
LO
4>Has no effect in this case
Fig. 3-12. Input/output table for Zero-Cancel Logic stage.
Inputs
Outputs
6th-Digit BCD 7th-Digit Zero DP-5 6th-Digit Zero-Cancel
<p HI LO
1-9 o LO
Zero LO
Hl
LO
LO
HI
5th-Digit BCD
6th-Digit Zero DP-6 5th-Digit Zero-Cancel
$ HI <I> LO
1-9 <P C> LO
0)
<I> HI LO
Zero LO LO HI
From
Counter
Circuit
and Control Circuit
Fig. 3-13. Readout Encoding circuit detailed block diagram.
3-14