Tektronix 7D14, Инструкция по эксплуатации

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Circuit Description—7D14
Generator to turn the GATE output "on" or "off" as deter­
mined by the MANUAL GATE pushbuttons or by an exter­
nal gating signal applied to the EXT GATE input
connector.
This stage provides a LO output to the direct-clear input
of U735 at pin 14 to turn the Gate Generator GATE out­
put "off", or a LO output to the direct-set input of U735
at pin 10 to turn the GATE output "on".
Gate Generator
The Gate Generator stage includes three J-K flip-flops
with direct-set and direct-clear inputs. U735 generates the
GATE and GATE output signals. Inputs to U735, U733A,
and U733B determine the state of the GATE signal. The
Gate Generator stage outputs are provided by two emitter­
coupled transistor pairs, Q751-Q753 and Q758-Q763.
These transistor pairs isolate the U735 outputs from the
circuits being driven, and also provide signal gain.
The INTERNAL input is applied to the base of Q714
through R717, and to the base of U729B through
CR722-R722. When either of the MANUAL GATE push­
buttons is in, the INTERNAL input is LO. The levels at the
inputs and outputs of U708A-U708B and at the collector
of Q742 for the MANUAL GATE ON and OFF pushbutton
settings are shown in Fig. 3-17. When the collector of Q742
is LO, the GATE is "on" and when U708B-pin 4 is LO, the
GATE is "off".
When the MANUAL GATE OFF button is in, the EXT
GATE input connector is connected to the base of Q714
through R716-C716. A HI level applied to the EXT GATE
connector is inverted by Q714 to provide a LO to U708B at
pin 5. This will cause the level at U708B-pin 4 to go HI.
This LO to HI transition is coupled to the base of U729A
through C743 to momentarily turn U729A on. The collec­
tor of U729A goes LO to provide an output to the direct-
set input of U735. When the input to the EXT GATE con­
nector goes LO, the collector of Q714 goes HI. As a result,
the level at U708B-pin 4 goes LO to provide a clear com­
mand to the direct-clear input of U735.
The INTERNAL input is HI when the MEASUREMENT
INTERVAL switch is set to one of the internal-gate posi­
tions, 1 ms through 10 s. This HI level inhibits the Manual/
External Gate Input stage by applying forward bias to
saturate U729B through CR722-R722 and Q714 through
R717. Due to saturation, the collectors of Q714 and
U729B are LO. The LO at the collector of Q714 holds
U708B-pin 5 LO. This results in a HI level output at
U708B-pin 4. The LO at the collector of U729B applies
reverse bias to U729A to keep its collector HI. As a result,
U735 is not affected by the Manual/External Gate Input
stage under this condition.
Fig. 3-17. Manual/External Gate Input stage input and output levels
for MANUAL GATE operation.
MANUAL
GATE
U708A-U708B 0742
Pin 5 Pin 2 Pin 4
Collector
ON
LO
HI HI
LO
OFF HI LO LO HI
U733A is connected as an RS flip-flop. The 1-output
(pin 11) is connected to the U733B J-input and to the
Display Generator stage (U729D). The 0-output (pin 10) is
connected to the Manual/External Gate Input stage through
R724.
The DCU RESET signal (produced by U731A) is
coupled through C783-R783 to the base of Q781. When the
DCU RESET input goes HI, the LO to HI transition
momentarily turns on Q781 to pull its collector LO. This
LO applied to the U733A direct-set input (pin 7) sets
U733AforaHI 1-output.
At the end of the GATE "on" time, a LO CLEAR com­
mand is provided to the U733A direct-clear input (pin 8).
This clears U733A to provide a LO 1-output.
Triggered J-K flip-flop U733B is clocked by the Time
Base Decade Counters output to turn the Gate Generator
GATE output "on" for the gate time selected by the
MEASUREMENT INTERVAL switch. The U733B 1-and
0-outputs set the levels at the U735 J- and K- inputs respec­
tively. An input/output table applicable to U733B or U735
is shown in Fig. 3-18.
The level at the U733B J-input is the U733A 1-output
level. The level at the U733B K-input is the U733B
1-output level. The LO DCU RESET input to the direct-
clear input clears U733B for a LO 1-output level.
A LO input to the direct-set input sets the 1 output HI.
A LO input to the direct-clear input sets the 1 output LO.
Inputs
Outputs
Condition
after trigger
pulse
J K
1 I 0
LO LO
No change
LO HI LO HI
HI
LO HI
LO
HI
HI Changes
state
Fig. 3-18. Input/output table for U733B or U735.
3-21