VCCK22
VCCK23
VCCK24
VCCK25
VCCK26
VCCK27
VCCK28
VCCK29
VCCK30
VCCK31
1
2
3
4
5
6
7
8
9
10
11
12
H
G
F
E
D
C
B
A
12
11
10
9
8
7
6
5
4
3
2
1
THIS DRAWING CANNOT BE COMMUNICATED TO UNAUTHORIZED PERSONS COPIED UNLES S PERMITTED IN WRITING
FORMAT DIN A1
H
G
F
E
D
C
Tel +86-755-3331xxxx Fax +86-755-3331xxxx
Nanshan District, Shenzhen, Guangdong
B Building, TCL Tower, Nanhai Road
CVBS_COM
CVBS3P
CVBS2P
CVBS1P
CVBS0P
SIF_COM
PDD7
PDD6
PDD5
PDD4
PDD3
PDD2
PDD1
PDD0
OPCTRL0
OPCTRL1
OPCTRL2
OPCTRL3
OPCTRL4
OPCTRL5
ADIN0_SRV
ADIN1_SRV
ADIN2_SRV
ADIN3_SRV
ADIN4_SRV
ADIN5_SRV
ADIN6_SRV
ADIN7_SRV
AIN_R0
AIN_L0
AIN_R1
AIN_L1
AIN_R2
AIN_L2
AIN_R3
AIN_L3
HDMI_0_SCL
HDMI_1_SCL
HDMI_2_SCL
HDMI_0_SDA
HDMI_1_SDA
HDMI_2_SDA
HDMI_0_HPD_CBUS
HDMI_1_HPD
HDMI_2_HPD
(4)
(9)
(4)
(4)
(4)
(4)
(4)
(4)
(4)
(4)
(4)
(4)
(4)
(4)
(4)
(4)
(4)
(4)
(4)
(4)
(4)
(4)
(4)
(7)
(7)
(7)
(3)
0
0
0
0
0
Crystal oscillator port
SOC-VEDIO
SOC-AUDIO
When input is 12V,reset time is 80ms
When input is 12V reset vol:8.4V
MTK
Reset at low level
Bottom SIDE
SOC-POWER
SOC-EMMC
SOC-CI
SOC RESET
SOC-USB
SOC-Ethernet
STRAPPING
OPCTRL3
eMMC pins(share pins w/s NAND)
ICE moce + 24M + ROM to eMMC boot from
ICE moce + 24M + ROM to 60bit ECC Nand boot
ICE mode + 24M + serial boot
0
0
1
1
SOC-HDMI
(3)
(2)
(2)
(7)
(7)
(7)
(7)
(3)
(4)
(4)
(4)
(4)
(1)
(4)
(2)
(4)
(4)
(4)
(4)
(4)
(4)
(4)
(4)
LED_OUT
LED_PWM0
SOC Config
(4)
(4)
(1)
(2)
Close to Main Chip
(8)
(8)
(8)
(8)
(3)
(7)
(4)
(4)
(9)
(4)
(4)
(9)
(9)
(3)
(7)
(9)
(9)
(8)
(8)
(2)
(2)
(9)
R580
R540
C536
SPI_CSN
IF_AGC
W14
AD14
AE14
J15
K15
L15
M15
N15
P15
R15
T15
U15
V15
J16
K16
L16
M16
U001
SPI_SDI
Y21
W22
Y22
AA22
AB22
Y23
AA23
AB23
AA24
AB24
U001
IFN
IFP
NC/
SPI_SDO
NC/