CHAPTER FOUR
4-6
bc635VME/bc350VXI Time and Frequency Processor (Rev. E)
Symmetricom Inc
4.1.5 PACKET “F” HEARTBEAT (PERIODIC) CONTROL
This packet establishes the frequency of the TFP output periodics. The number of output pulses
is defined by the following equation.
N = 10,000,000 / (n1 * n2)
where N = output pulses per second
n1 = a programmable number in the range of 2 to 65535
n2 = a programmable number in the range of 2 to 65535
The “F” packet establishes the value of n1 and n2. There is a one byte qualifier associated with
the “F” packet. This qualifier allows the periodics to be asynchronous or synchronous with
respect to the 1pps epoch. If the synchronous format is chosen n1 and n2 must be selected such
that N is an integer.
The duty cycle of the output waveform is dependent on the particular values of n1 and n2
selected. Divider n2 physically follows divider n1. The following example serves as an
illustration. If n1 * n2 = 20, the output frequency is 500kHz. If n1 is selected as ten and n2 is
selected as two a square wave is output since the last divider is a divide by two. If n1 is selected
as two and n2 is selected as ten the output waveform is a pulse train with a one tenth duty cycle.
The packet “F” format is as follows:
byte
1
SOH
byte
2
“F”
byte
3
“2” for asynchronous “5” for synchronous
byte
4
“0” - “F” m1 bits 12-15
byte
5
“0” - “F” m1 bits 08-11
byte
6
“0” - “F” m1 bits 04-07
byte
7
“0” - “F” m1 bits 00-03
byte
8
“0” - “F” m2 bits 12-15
byte
9
“0” - “F” m2 bits 08-11
byte
10
“0” - “F” m2 bits 04-07
byte
11
“0” - “F” m2 bits 00-03
byte
12
ETB
If a two (asynchronous) qualifier is used then the values of n1 and n2 are the same as the packet
values m1 and m2. If the five (synchronous) qualifier is used, then the values of n1 and n2 are
equal of packet values m1+1 and m2+1 respectively. For example, if a synchronous 500KHz
square wave is desired then the qualifier byte is five, m1 = 9, and m2 = 1. Additional insight
into the operation of the counter can be gained by reading the Intel documentation for the 82C54
integrated circuit. The two and five qualifiers correspond to the Intel defined Modes 2 and 5.
The periodic engine of the bc635/637VME consists of two sections of an INTEL 82C54
programmable interval timer connected in a serial configuration and driven by the TFP 10 MHz
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