INTERFACES
Symmetricom Inc
bc635VME/bc350VXI Time and Frequency Processor (Rev. E)
3-3
Offset 0x02
DEVICE
Reset Value 0xX350
This register simply contains (in the case of an A16 only device) a manufacturer's card ID. Bits
12-15 are not driven high during a read of the Device Register. In most cases they will float high
during a read cycle.
Offset 0x04
STATUS
Reset Value 0xffff
The TFP does not support VXIbus initialization and diagnostic features. The reset value is
always returned.
Offset 0x04
CONTROL
Reset Value 0xfffe
Writing to this register with bit 0 set will deassert any pending interrupts and will clear all used
bits in offsets 0x20 through 0x2E (except FIFO at offset 0x28). Writing to this register with bit
zero cleared has no effect. All other bits are ignored during a write.
Offset 0x0A
TIMEREQ
Reset Value NA
Reading this register latches the current time and status into offsets 0x0C through 0x14. The
value read is indeterminate.
* * * WARNING * * *
Many compilers will optimize out of existence an assignment made to a local variable if that
variable is not used. For example, the following code snippet may not read offset 0x0A.
timeptr = (short *)(BASE + 0x0A) ;
/* initialize pointer */
local_dummy = *+ ;
/* latch the time ?? */
read_time(timeptr) ;
/* read the time */
The following form is recommended. Use of the global prevents optimizing out.
timeptr = (short *) (BASE + 0x0A) ;
/* initialize pointer */
global_dummy = *+ ;
/* latch the time */
read_time(timeptr) ;
/* read the time */
Offset 0X0C
TIME0
Reset Value NA
Offset 0X0E
TIME1
Reset Value NA
Offset 0X10
TIME2
Reset Value NA
Offset 0X12
TIME3
Reset Value NA
Offset 0X14
TIME4
Reset Value NA
For clarity the above offsets have been grouped.
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