Chapter 2: Installation
2-15
JPW2
JPW3
J11
+
LE4
SW1
JPW1
FA
N
4
FA
N
8
FAN7
FAN3
FA
N
1
4
1
FAN2
FA
N
6
FA
N
5
JLPC80
JPCIE3
JWD1
JPL1
JPG1
LE1
LE2
JBAT1
JL1
JNMI1
JSPK1
J_UID_OW
PHY
x4 in x16 Slot
SBX 2B
SBX 1B
PCI-E 2.0
SBX 2A
IPMB
T-SGPIO0
IPMI_LAN
USB2/3
SBX 1A
P2 DIMM1A
P1DIMM3A
P2 DIMM1B
P1 DIMM2B
P2 DIMM2A
P1 DIMM2A
P2 DIMM2B
P1 DIMM1B
P2 DIMM3A
P1 DIMM1A
P2 DIMM3B
CLEAR
VGA
COM1
LAN2
LAN1
USB0/1
CMOS
I-SA
TA
1
JPI2C (PWR I2C)
CPU1
CPU2
BIOS
T-SGPIO1
I-SA
TA
2
I-SA
TA
3
I-SA
TA
4
I-SA
TA
5
I-SA
TA
6
Intel
ICH10R
(South Bridge)
Intel
5520
IOH-36D
Intel
82576
LAN CTRL
Winbond
450R
BMC
P1 DIMM3B
Front Panel CTRL
Battery
X8DTG-DF
J12
JPCIE1
JPCIE2
Front Control Panel
JF1 contains header pins for various buttons and indicators that are normally lo-
cated on a control panel at the front of the chassis. These connectors are designed
specifi cally for use with Supermicro server chassis. See the fi gure below for the
descriptions of the various control panel buttons and LED indicators. Refer to the
following section for descriptions and pin defi nitions.
JF1 Header Pins
Power Button
OH/Fan Fail/PWR
Fail/UID LED
1
Reset Button
2
HDD LED
Power LED
Reset
PWR
3.3V
FP UID Switch/3.3V SB
3.3V
Ground
Ground
19
20
Blue_LED_Cathode
(UID)/5V SB
Key
Ground
Key
NIC2 (Activity) LED
PWR Fail LED
NIC2 (Link) LED
NIC1(Link) LED
NIC1 (Activity) LED
No Connection
Содержание X8DTG-DF
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