Chapter 4: AMI BIOS
4-21
PCI PERR/SERR Support
Select Enabled to allow a PCI device to generate a PERR/SERR number for a PCI
Bus Signal Error Event. The options are Enabled and
Disabled
.
Above 4G Decoding (Available if the system supports 64-bit PCI decoding)
Select Enabled to decode a PCI device that supports 64-bit in the space above 4G
Address. The options are Enabled and
Disabled
.
SR-IOV Support (Available if the system supports Single-Root
Virtualization)
Select Enabled for Single-Root IO Virtualization support. The options are Enabled
and
Disabled.
Maximum Payload
Select Auto for the system BIOS to automatically set the maximum payload value
for a PCI-E device to enhance system performance. The options are
Auto
, 128
Bytes and 256 Bytes.
Maximum Read Request
Select Auto for the system BIOS to automatically set the maximum size for a read
request for a PCI-E device to enhance system performance. The options are
Auto
,
128 Bytes, 256 Bytes, 512 Bytes, 1024 Bytes, 2048 Bytes, and 4096 Bytes.
ASPM Support
Use this item to set the Active State Power Management (ASPM) level for a PCI-E
device. Select Auto for the system BIOS to automatically set the ASPM level based
on the system configuration. Select Disabled to disable ASPM support. The options
are
Disabled
and Auto.
Warning
: Enabling ASPM support may cause some PCI-E devices to fail!
MMIOHBase
Use this item to select the base memory size according to memory-address map-
ping for the IO hub. The base memory size must be between 4032G to 4078G. The
options are
56T
, 48T, 24T, 512G, and 256G.\
MMIO High Size
Use this item to select the high memory size according to memory-address mapping
for the IO hub. The options are
256G
, 128G, 512G, and 1024G.
PCH SLOT1 PCI-E 2.0 x4 (in x8) OPPROM, CPU SLOT2 PCI-E 3.0 x4 (in x8)
OPPROM, CPU SLOT3 PCI-E 3.0 x8 OPPROM, CPU SLOT4 PCI-E 3.0 x8 (in
x16) OPPROM, CPU SLOT5 PCI-E 3.0 x8 OPPROM, CPU SLOT6 PCI-E 3.0
x16 OPPROM, CPU SLOT7 PCI-E 3.0 x8 OPPROM,
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