Supero X10SRL-F, Руководство пользователя

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2-30
X10SRL-F User’s Manual
BIOS LICENSE
IPMI CODE
MAC CODE
BAR CODE
DESIGNED IN USA
1.01 Rev:
X10SRL-F
1
+
LAN
CTRL
LAN
CTRL
BMC
JP3
JTPM1
JF1
JD1
T-SGPIO1
T-SGPIO2
T-SGPIO3
JOH1 JL1
JPME2
JWD1
JPG1 JPB1
JI2C2 JI2C1
JBR1
JPL2
JPL1
JVR1
JSD1
JSD2
JIPMB1
JPWR1
UID LED - LE1
LE2
LEDM1
JBT1
BT1
FAN4
FAN1 FAN2
FAN3
FANA
FAN5
J24
JPI2C1
JSTBY1
S-SATA3
I_SA
TA4
I-SATA0 I-SATA1 I-SATA2 I-SATA3
S-SA
TA0
S-SA
TA1
S-SATA2
I-SATA5
SP1
CPU
CPU SLOT5 PCI-E 3.0 X8
CPU SLOT4 PCI-E 3.0 X8(IN X16)
USB0/1
DIMMC2
USB8/9
USB6/7
USB2/3(3.0)
LAN1
DIMMA2 DIMMA1
USB10(3.0)
LAN2
USB4/5
CPU SLOT2 PCI-E 3.0 X4(IN X8) PCH SLOT1 PCI-E 2.0 X4(IN X8)
COM2
COM1
DIMMB2 DIMMB1 DIMMD2 DIMMD1
IPMI_LAN
UID - SW
5V STBY
USB11(3.0)
IPMI
VGA
CPU SLOT7 PCI-E 3.0 X8
DIMMC1
CPU SLOT3 PCI-E 3.0 X4(IN X8)
CPU SLOT6 PCI-E 3.0 X8(IN X16)
Intel PCH
1
1
A. T-SGPIO 1
B. T-SGPIO 2
C. T-SGPIO 3
D. SMB Connector
B
T-SGPIO 1/2/3 Headers
Two Serial-Link General Purpose Input/
Output headers (T-SGPIO 1/2/3) are
located on the motherboard. T-SGPIO
1/2/3 support onboard SATA interface.
See the table on the right for pin defini -
tions.
Note:
NC= No Connection
T-SGPIO/6-SGPIO
Pin Definitions
Pin# Definition Pin Definition
2 NC 1 NC
4 Data 3 Ground
6 Ground 5 Load
8 NC 7 Clock
Power SMB (I
2
C) Connector
Power System Management Bus (I
2
C)
Connector (JPI
2
C1) monitors power sup -
ply, fan and system temperatures. See
the table on the right for pin definitions.
PWR SMB
Pin Definitions
Pin# Definition
1 Clock
2 Data
3 PWR Fail
4 Ground
5 +3.3V
C
D
A