Chapter 2: Installation
2-27
1
JD1
7
JIPMB1
C
A
4
5
8
1
JPW2
I-S
AT
A5
I-SATA4
I-SATA3
I-S
AT
A2
2
UID_SW
1
DIMM_C1
DIMM_C2
DIMM_D1
DIMM_A1
DIMM_B1
DIMM_A2
DIMM_B2
DIMM_D2
I-SATA1
I-SATA0
I-SAS3
I-SAS2
I-SAS1
I-SAS0
7
JVGA
2
1
JF1
19
20
JKBMS1
C
A
UID_LED
JLAN_USB12
X_BT1
+
5
JPI2C
1
1
JBT1
1
JPW1
13
JUSB2
3-SGPIO1
2
8
T-SGPIO2
T-SGPIO1
JOH1
1
JL1
1
JI2C
2
1
JI2C
1
A
DP3
C
A
JPBIOS
1
JP
ME1
1
JIBTN1
3
1
3
JWD1
JVR2
3
1
JPL2
1
JPL
1
1
3
JVR1
1
3
1
JPUSB1
3
3
JPG1
1
JPB1
1
FANA
FAN5
1
4
FAN3
FA
N4
1
FAN2
4
1
FAN1
4
MH11
MH1
MH5
MH9
MH8
MH2
MH10
JCOM1
PCIE
6
PCIE
5
PCIE
4
PCIE
3
PCIE
7
2
JTPM1
PCIE
1
PCIE
2
JPK1
1
3
JSD1 JSTB
Y1
1
3
JLAN1
JLAN2
RE
V:
1.00
Tested to
Co
mply
Wi
th FC
C Standards
FOR HOME OR OFFICE US
E
DESIGNED IN USA
BAR CODE
JC
OM2
1
5
6
9
1
7
2
JUSB4
5
1
7
2
JUSB67
1
7
JUSB89
P1-DIMM2
D
P1-DIMM2
C
P1-DIMM1
C
P1-DIMM1
D
P1-DIMM2B
P1-DIMM2A
CPU1
SL
OT
7 PCI-E 3.0X8 (INX8)
SL
OT
6 PCI-E 3.0X8 (INX16)
SL
OT
5 PCI-E 3.0X8 (INX8)
SL
OT
4 PCI-E 3.0X8 (INX16)
SL
OT
3 PCI-E 3.0X4 (INX8)
SL
OT
2 PCI-E 3.0X4 (INX8)
SL
OT
1 PCI-E 2.0X4 (INX8)
X9SR
L
JPK1
JP
ME
1
JBT1 C
OMS CLEAR
JPBIOS1
JL1 CHASSIS INTRUSION
JSD1:SATA DOM POWER
JPI2C1:PWRI2
C
JT
PM
1:TP
M/PORT80
ON:ME RE
CO
VERO
S
OF
F:
NORMAL
CO
M2
Pin1:RAID_KEY_PCH
Pin3:PCH_DYN_SKU
Pin2:Ground
JPB1
1-2 Enable
2-3 Disable
1-2:NORMAL
2-3:RECOVER BIOS
1-2 Enable
2-3 Disable
JPG1: VGA
OFF:DISABLE
JI2C1/JI2C2
ON: ENABLE
UID
RST
ON PW
R
LAN2
PW
R
FF OH
FA
IL
HD
D
LE
D
PW
R
X
NIC
1
2
NIC
NM
I
LAN1
2-3:NMI
1-2:RST
2-3 Disable
1-2 Enable
JWD1:Watch Dog
JPL1/2: LAN
PWR LED
SPEAKER
1-3:
4-7:
JD1:
VGA
CO
M1
IPMI_LAN
USB0/1
2-3 ENable
P1-DIMM1B
KB/MOUSE
1-2 Disable
JPUSB1:USB Wake Up
P1-DIMM1A
A. Overheat/Fan Fail LED
B. IPMI System Management Bus Header
B
Overheat/Fan Fail LED (JOH1
)
The JOH1 header is used to connect an LED
to provide warnings of chassis overheat. This
LED will also blink to indicate a fan failure.
Refer to the table on right for pin definitions.
Overheat LED
Pin Definitions
Pin# Definition
1
5vDC
2
OH Active
A
System Management Bus (JIPMB
)
A System Management Bus header for the
IPMI slot is located at IPMB. Connect the
appropriate cable here to use the IPMB I2C
connection on your system.
System Management
Bus
Pin# Definition
1
Data
2
Ground
3
Clock
4
No Connection
Содержание Supero X9SRL
Страница 1: ...USER S MANUAL Revision 1 0b X9SRL X9SRL F...
Страница 26: ...1 14 X9SRL Motherboard Series User s Manual Notes...
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Страница 70: ...3 8 X9SRL Motherboard Series User s Manual Notes...
Страница 98: ...4 28 X9SRL Motherboard Series User s Manual Notes...
Страница 100: ...A 2 X9SRL Motherboard Series User s Manual Notes...
Страница 104: ...B 4 X9SRL Motherboard Series User s Manual Notes...