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Chapter 1: Introduction
1-9
1-2 Chipset Overview
Intel’s Alderwood (925X) chipset, designed for use with the Pentium 4 LGA
775 CPU, is comprised of two primary components: the Memory Controller
Hub (MCH) and the I/O Controller Hub (ICH6R). The Alderwood (925X)
provides the performance and feature-set required for the high-end desk-
top and the UP workstation market.
Memory Controller Hub (MCH)
The function of the MCH is to manage the data flow between five inter-
faces: the CPU interface Front Side Bus (FSB), System Memory Interface
(DRAM controller), PCI Express Graphic Interface, I/OController and the Di-
rect Media Interface (DMI). The MCH is optimized for the Pentium 4 proces-
sors in an LGA775 Package. It supports one or two channels of unbuf-
fered, ECC DDR2 533/400 SDRAM. It also supports the PCI-Express-based
external graphics solutions.
The ACPI component provides the data buffering and interface arbitration
required to ensure that system interfaces operate efficiently. The Direct
M e d i a I n t e r f a c e ( D M I ) i s a p o i n t - t o - p o i n t i n t e r c o n n e c t b e t w e e n t h e
AlderwoodMCH and the ICH6R. Virtually all communication between the MCH
and the ICH occurs over the Direct Media Interface. DMI supports 2GB/s
(IGB/s each direction) of bandwidth, using a 100 MHz differential clock.
Intel ICH6R System Features
The I/O Controller Hub provides the I/O subsystem with access to the rest
of the system. Functions and capabilities include:
*PCI Express Base Specification, Rev. 1.0a-compliant
*PCI 2.3
*ACPI Power Management Logic Support
*USB host interface
*Enhanced DMA Controller
*System Management Bus
*Low Pin Count (LPC) Interface
*Firmware Hub (FWH) Interface