17
Chapter 1: Introduction
Figure 1-5. Motherboard Layout
1.4 Motherboard Layout
Below is a layout of the X12DPi-N(T)6 motherboard with jumper, connector and LED locations
shown. See the table on the following page for descriptions. For detailed descriptions, pinout
information and jumper settings, refer to
or the
C
MAC CODE
BIOS
LICENSE
BMC CODE
JS
3
JS1
BMC
BMC
Firmware
BIOS
JM2_1
JF1
LAN1
LAN2
FAN3
FAN4
JUSBRJ45
JNCSI
JUIDB1
FANB FANA
FAN6
FAN2FAN1
JPI2C1
LE4
LE6
JRK1
(Front) VGA
JBT1
JSTBY1
JPME1
JIPMB1
JNVI2C
JPWR4
JPWR2
S-SGPIO
SATA5 SATA6
JPWR3
JLAN2
JLAN1
UID LED
JS2
M.2 Slot
TPM/Port80
PCH
LED
PWR
BMC Heartbeat LED
BMC_LAN/USB7/8(3.0)
P1_NVME2/3
P1_NVME0/1
I-S
AT
A0~
3
I-S
AT
A4~7
USB6(3.0)
USB4/5(3.0)
USB2/3
(3.0)
USB0/1
(2.0)
S-SATA4S-SATA5
S-S
AT
A0~3
VGA
COM2
COM1
CMOS CLEAR
UID/BMC
P1-DIMMG1
P1-DIMMF1 P1-DIMME1 P1-DIMMH1
P2-DIMMG1
P2-DIMME1 P2-DIMMF1
P2-DIMMH1
CPU2
CPU1
CPU1 SLOT1 PCIe 4.0 X8 CPU1 SLOT2 PCIe 4.0 X16
CPU1 SLOT3 PCIe 4.0 X16
CPU2 SLOT4 PCIe 4.0 X16
CPU2 SLOT5 PCIe 4.0 X16
CPU2 SLOT6 PCIe
4.0 X8
P1-DIMMB1
P1-DIMMA1
P1-DIMMD1
P1-DIMMC1
P2-DIMMC1
P2-DIMMD1
P2-DIMMB1
P2-DIMMA1
LE3
JL1
BAR CODE
VROC
JVGA
JFP2
LAN CTRL2
JTPM-1
RAID KEY-1
Front Panel CTRL
P2-DIMMB2
P1-DIMMB2
CPLD
FAN5
REV:1.00
X12DPi-N(T)6
LAN CTRL1
(*X12DPI-N6)
X12DPI-NT6
BT1
Battery
Reset
MH15
MH16
NVME
JPL1
LEDM1
JPWR4
P2-DIMMC1
JF1
JPWR2
LE3
JPWR3
P2-DIMMD1
P2-DIMMA1
P2-DIMMB1
P2-DIMMG1
P2-DIMMH1
P2-DIMME1
P2-DIMMF1
JIPMB1
USB6 (3.0)
M.2
JL1
COM2
JPME1
Battery
S-SGPIO
S-SATA0-3
JNVI2C
USB0/1 (2.0)
USB4/5 (3.0)
LE4
BIOS
JTPM1
I-SATA0-3
I-SATA4-7
Front VGA
(JFP2)
Clear CMOS
LE6
BMC_LAN
USB7/8(3.0)
LAN2
USB2/3(3.0)
LAN1
COM1
VGA
FAN5
FAN4
FANA
VROC(JRK1)
P1_NVME2/3
S-SA
TA4
JNCSI
UID/BMC Reset
FAN2
JPI2C1
Slot4
LEDM1
Slot3
Slot1
FANB
JSTBY1
Slot6
LANCTRL2 (X12DPi-N6)
FAN6
Slot5
Slot2
S-SA
TA5
FAN3
P1-DIMMG1
P1-DIMMF1
P1-DIMMH1
P1-DIMME1
P1-DIMMB1
P1-DIMMC1
P1-DIMMA1
P1-DIMMD1
FAN1
P1-DIMMB2
P2-DIMMB2
LANCTRL1 (X12DPi-NT6)
P1_NVME0/1
JPL1
MH15
MH16