Supermicro SuperServer 8028B-C0R3FT, Руководство пользователя

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Chapter 1: Introduction
1-5
Figure 1-1. Intel C602J Chipset:
System Block Diagram
Note: This is a general block diagram. Please see Chapter 5 for details.
CPU2 CPU3
CPU1 CPU4
QPI0
QPI2
QPI1
QPI1
QPI2 QPI2
QPI0
QPI1 QPI2
QPI0
QPI0 QPI1
DRA
M
DRA
M
DRA
M
DRA
M
DRA
M
DRA
M
DRA
M
VMSE0
VMSE1
VMSE0
VMSE1
VMSE0
VMSE1
VMSE0
VMSE1
DRA
M
PCH
LS
I
SAS3008
PCIE
X
8
PCIE PCIE
PCIE PCIE
PCIE
X
16
PCIE
X
16
DMI
DMI
X540
RJ45
RJ45
PCIE
COM
VGA
PHY
PHY
BMC
RTL8201 RJ45
USB
USB
Memory
Buffer
CTRL
Memory
Buffer
CTRL
Memory
Buffer
CTRL
Memory
Buffer
CTRL
Memory
Buffer
CTRL
Memory
Buffer
CTRL
Memory
Buffer
CTRL
(X10QBL-CT only)
(X10QBL-CT)
(X10QBL) i350
Memory
Buffer
CTRL
PCIE
PHY
PHY
PCIE
X
8
1-4 Advanced Power Management
Intel® Intelligent Power Node Manager (NM)
The Intel
®
Intelligent Power Node Manager (IPNM) provides your system with
real-time thermal control and power management for maximum energy efficiency.
Although IPNM Specification Version 1.5 is supported by the BMC (Baseboard
Management Controller), your system must also have IPNM-compatible
Manageability Engine (ME) firmware installed to use this feature.
Manageability Engine (ME)
The Manageability Engine, which is an ARC controller embedded in the IOH (I/O
Hub), provides Server Platform Services (SPS) to your system. The services
provided by SPS are different from those proveded by the ME on client platforms.