Supermicro SUPERSERVER 5018A-LTN4, Руководство пользователя

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SUPERSERVER 5018A-LTN4 User's Manual
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CPU Confi guration
The following CPU information will be displayed:
•
Processor ID
•
Processor Frequency
•
Microcode Revision
•
L1 Cache RAM
•
L2 Cache RAM
•
Processor Version
Clock Spread Spectrum
If this feature is set to Enabled, the BIOS utility will monitor the level of
Electromagnetic Interference caused by the components and will attempt to reduce
the interference whenever needed. The options are Enabled and Disabled .
EIST (GV3)
EIST (Enhanced Intel® SpeedStep Technology) GV3 allows the system to
automatically adjust processor voltage and core frequency in an effort to reduce
power consumption and heat dissipation. Select Auto to enable 80 CPU stepping
support automatically and disabled other functions. The options are Disabled,
Enabled, and Auto . Please refer to the Intel
®
website for detailed information.
P-STATE Coordination
This feature selects the type of coordination for the P-State of the processor.
P-State is a processor operational state that reduces the processor's voltage and
frequency to enhance CPU energy effi ciency. The options are Hardware, Package ,
and Module.
TM1 (Available when supported by the CPU.)
Select Enable to activate TM1 support for system thermal monitoring. TM1 allows
the CPU to regulate its power consumption based upon the modulation of the
CPU Internal clock when the CPU temperature reaches a pre-defi ned overheating
threshold. The options are Disabled and Enabled .
TM2 Mode (Available when supported by the CPU.)
Use this feature to select the throttling mode for TM2. The options are LEM Throttling
and Adaptive Throttling.