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SuperServer 2048U-RTR4 User’s Manual
CPU C6 Report (Available when Power Technology is set to Custom)
Select Enable to allow the BIOS to report the CPU C6 state (ACPI C3) to the
operating system. During the CPU C6 state, power to all cache is turned off.
The options are
Enable
and Disable.
Enhanced Halt State (C1E)
Select Enable to use the "Enhanced Halt State" feature, which will significantly
reduce the CPU's power consumption by reducing the CPU's clock cycle and
voltage during a "Halt State." The options are Disable and
Enable
.
Chipset Configuration
North Bridge
This feature is used to configure Intel North Bridge settings.
IIO (Integrated IO) Configuration
EV DFX (Device Function On-Hide) Features
When this item is set to Enable, the EV_DFX Lock Bits that are located on a
processor will always remain clear during electric tuning. The options are
Disable
and Enable.
IIO0 Configuration
IOU2 (IIO PCIe Port 1)
This feature allows the user to set the bus speed between the IOU2 and the
PCI-Exp port specified above. The options are x4x4, x8, and
Auto
.
IOU0 (IIO PCIE Port 2)
This feature allows the user to set the bus speed between the IOU0 and the
PCI-Exp port specified above. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8,
x16, and
Auto
.
IOU1 (IIO PCIE Port 3)
This feature allows the user to set the bus speed between the IOU1 and the
PCI-Exp port specified above. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8,
x16, and
Auto
.
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