9
Chapter 1: Introduction
1.1 Quick Reference
Notes:
•
Components not documented are for internal testing only.
•
See Chapter 2 for detailed information on jumpers, I/O ports, and JF1 front panel connec
-
tions.
•
Use only the correct type of onboard CMOS battery as specified by the manufacturer. To
avoid possible explosion, do not install the onboard battery upside down.
Figure 1-2. H13DSH Layout
JPW3
JHDT1
FAN3
FAN2
FAN4
FAN5
JPW4 JPW5
FAN6
FAN7
FAN8
FAN9
FAN10
JNVI2C1
JIPMB1
JUSB1
JSEN1
JPW1
JPWR1
P1_NVMe0/1
SATA8-15
P1_NVMe2/3
SATA0-7
JAIOM1
JCPLD1
LEDBMC
JAIOM2SB1
P1_NVMe6/7
P2_NVMe2/3
P2_NVMe0/1
P2_Slot2
JRSI2C1
JIO1
JTPM1
NCSI
JPW2
M.2-C1
M.2-C2
JPWR2
PSU2
P2_NVMe8/9
P2_NVMe10/11
P2_NVMe4/5 PSU1
CPU1
CPU2
DIMMJ13-J18
DIMMJ1-J6
JPCIE1
JPCIE2
JUART1
JUART2
JSATA1
JSATA2
DIMMJ7-J12
DIMMJ19-J24
P2_NVMe6/7
P1_NVMe4/5