1-5
Chapter 1: Introduction
Figure 1-1. Intel C602J Chipset:
System Block Diagram
Note:
This is a general block diagram and may not exactly repre-
sent the features on your serverboard. See the previous pages for
the actual specifications of your serverboard. This block diagram is
intended for your reference only.
CPU3
CPU4
CPU2
CPU1
Intel
C602J
IO Slot/ x16 slot
IO Slot/ x8 slot
TPM Chip
HM
NCT7904D
CPU3_S1-PCIE G3x8 in X8slot
CPU3_S2-PCIE G3x8 in X8slot
CPU3_S3-PCIE G3x16 in X16slot
CPU2_S1-PCIE G3x8 in X8slot
CPU2_S2-PCIE G3x16 in X16slot
CPU2_S3-PCIE G3x8 in X8slot
CPU1_S2-PCIE G3x8 in X8slot
CPU1_S3-PCIE G3x16 in X16slot
CPU4_S1-PCIE G3x8 in X8slot
CPU4_S2-PCIE G3x8 in X8slot
CPU4_S3-PCIE G3x16 in X16slot
LPC
SMBus
USB
PCIE x1
X4 DMI2
PCIE-G3x32 LANEs
PCIE-G3x32 LANEs
PCIE-G3x32 LANEs
PCIE-G3x24
LANEs
PCIE-G3x8 LANEs
QPI 9.6 GT/s
QPI 9.6 GT/s
QPI 9.6 GT/s
QPI 9.6 GT/s
QPI 9.6 GT/s
SMI2 Slot
SMI2 Slot
SMI2 Slot
SMI2 Slot
SMI2 Slot
SMI2 Slot
SMI2 Slot
SMI2 Slot
Power
Connector
Power
Connector
Power
Connector
Power
Connector
Power
Connector
Power
Connector
Power
Connector
Power
Connector
SMI2-CH0-3.2GT/s
SMI2-CH1-3.2GT/s
SMI2-CH2-3.2GT/s
SMI2-CH3-3.2GT/s
SMI2-CH0-3.2GT/s
SMI2-CH1-3.2GT/s
SMI2-CH2-3.2GT/s
SMI2-CH3-3.2GT/s
SMI2-CH0-3.2GT/s
SMI2-CH1-3.2GT/s
SMI2-CH2-3.2GT/s
SMI2-CH3-3.2GT/s
SMI2-CH0-3.2GT/s
SMI2-CH1-3.2GT/s
SMI2-CH2-3.2GT/s
SMI2-CH3-3.2GT/s
XDP0: CPU1 & CPU4
CPU2 & CPU3
Clock Subsystem
Clock Gen
Clock Buffer
CPLD
Power Management
Reset & PowerGood
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