Sun Microsystems Netra T4 AC100, Руководство по обслуживанию и системе

Страница: 251 / 284

Appendix E Example POST Diagnostic Output E-19
{1}Verify interrupt occurs at the right PIL
{0}Test walking 0 through softint register
{1}* Tick & Tick-Compare Reg
{0}Verify interrupt occurs for each level
{1}Walk 1/0 TICK Compare register
{0}Verify interrupt occurs at the right PIL
{1}Verify TICK register is counting
{0}* Tick & Tick-Compare Reg
{1}Verify TICK register Overflow
{0}Walk 1/0 TICK Compare register
{1}Verify TICK Interrupt
{0}Verify TICK register is counting
{0}Verify TICK register Overflow
{0}Verify TICK Interrupt
{1}* Stick & Stick-Compare Reg
{1}Walk 1/0 STICK Compare register
{1}Verify STICK register is counting
{0}* Stick & Stick-Compare Reg
{1}Verify STICK register Overflow
{0}Walk 1/0 STICK Compare register
{1}Verify STICK Interrupt
{0}Verify STICK register is counting
{0}Verify STICK register Overflow
{0}Verify STICK Interrupt
{1}* Measure CPU Clock
{0}* Measure CPU Clock
{0}AFT pin is high
{0}Setup Memory Controller
{0}* IMMU Registers
{1}* IMMU Registers
{0}Testing I-TSB
{1}Testing I-TSB
{0}Test walking 1 through the register
{1}Test walking 1 through the register
{0}Test walking 0 through the register
{1}Test walking 0 through the register
{0}Testing I-TLB Tag Access
{1}Testing I-TLB Tag Access
{0}Test walking 1 through the register
{1}Test walking 1 through the register
{0}Test walking 0 through the register
{1}Test walking 0 through the register
{0}* DMMU Registers
CODE EXAMPLE E-2 diag-level
Variable Set to
min
(3 of 15)