STMicroelectronics STM3210E-EVAL, Руководство пользователя

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Hardware layout and configuration UM0488
8/48 Doc ID 14220 Rev 5
2.2 Boot option
The STM3210E-EVAL evaluation board can boot from:
●
Embedded user Flash
● System memory with boot loader for ISP
●
Embedded SRAM for debugging
The boot option is configured by setting the switches BOOT0 and BOOT1.
2.3 Clock source
Two clock sources are available on the STM3210E-EVAL evaluation board for STM32F103
and RTC.
●
X2, 32KHz crystal for embedded RTC.
●
X1, 8MHz crystal with socket for STM32F103ZGT6 microcontroller, it can be removed
from socket when internal RC clock is used.
2.4 Reset source
The reset signal of the STM3210E-EVAL evaluation board is low active and the reset
sources include:
●
Reset button B1
●
Debugging tools from JTAG connector CN7 and trace connector CN9
●
Daughterboard from CN11
Table 2. Boot related switches
Switch Boot from
Switch
configuration
BOOT0
BOOT1
STM3210E-EVAL boots from User Flash when BOOT0 is set as shown
to the right. BOOT1 is not required in this configuration.
(Default setting)
STM3210E-EVAL boot from Embedded SRAM when BOOT0 and
BOOT1 are set as shown to the right.
STM3210E-EVAL boot from System Memory when BOOT0 and
BOOT1 are set as shown to the right.
0 < > 1
Boot 0
0 < > 1
Boot 0
Boot 1
0 < > 1
Boot 0
Boot 1
Table 3. Reset related jumper
Jumper Description
JP19
Enables reset of the STM32F103ZGT6 embedded JTAG TAP controller each time a
system reset occurs. JP19 connects the TRST signal from the JTAG connection with the
system reset signal RESET#. Default setting: not fitted
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