STMicroelectronics STM32 Cortex-M3, Руководство пользователя

Страница: 15 / 60

2.4 Processor STM32F103RB from STMicroelectronics
1 Intro
2 Electrocardiogram ( Ecg ) Signals
The Electrocardiogram (
Ecg
)
•
Ecg
: electrical manifestation of heart activity recorded
from the body surface
•
monitoring of heart rate
The
Ecg
signal can be recorded fairly easily with surface
electrodes placed on the limbs and/or the chest, see pages 6 – 16
below.
Josef Goette 2 2009
2.4.2 Performance Line Block Diagram
The block diagram in Figure 2.1 shows how the components and the core are connected together.
STM32F103x8, STM32F103xB Description
Doc ID 13587 Rev 10 19/91
Figure 1. STM32F103xx performance line block diagram
1. T
A
= –40 °C to +105 °C (junction temperature up to 125 °C).
2. AF = alternate function on I/O port pin.
U S BDP/CAN_TX
PA[ 15:0]
EXTI
W W D G
12 b it ADC1
16AF
JTDI
JTCK/ S WCLK
JTM S / S WDIO
NJTR S T TR S T
JTDO
NR S T
V
DD
= 2 to 3 .6V
8 0AF
PB[ 15:0]
PC[15:0]
AHB2
MO S I,MI S O, S CK,N SS
S RAM
2x( 8 x16 b it)
WAKEUP
GPIOA
GPIOB
GPIOC
F
m a x
: 7 2 M Hz
V
SS
S CL, S DA
I2C2
V
REF+
GP DMA
TIM2
TIM 3
XTAL O S C
4-16 MHz
XTAL 3 2 kHz
O S C_IN
O S C_OUT
O S C 3 2_OUT
O S C 3 2_IN
PLL &
AP
B1 :
F
m
a
x
=2
4 /
3
6 M
H
z
PCLK1
HCLK
CLOCK
MANAGT
PCLK2
as AF
as AF
Fl as h 12 8 KB
VOLT. REG.
3 . 3 V TO 1. 8 V
POWER
B a ck u p i nterf a ce
as AF
TIM 4
B
us
M
a
trix
64 b it
Inte
rf
a
ce
20 KB
RTC
RC 8 MHz
Cortex-M 3 CPU
I bu s
D bus
p bu s
o
b
l
fl
as
h
S RAM 512B
Tr a ce
Controlle r
U S ART1
U S ART2
S PI2
b x CAN
7 ch a nnel s
B a ck u p
reg
4 Ch a nn el s
TIM1
3 co mpl. Ch a nn el s
S CL, S DA, S MBA I2C1
as AF
RX,TX, CT S , RT S ,
U S ART 3
Temp s en s or
V
REF-
PD[15:0]
GPIOD
PE[15:0]
GPIOE
AH
B:F
m
a
x
=4
8
/7
2 MH
z
ETR a nd BKIN
4 Ch a nn el s
4 Ch a nn el s
4 Ch a nn el s
FCLK
RC 40 kHz
S t a nd b y
IWDG
@VBAT
POR / PDR
S UPPLY
@VDDA
VDDA
V SS A
@VDDA
V
BAT
RX,TX, CT S , RT S ,
S m a rt C a rd as AF
RX,TX, CT S , RT S ,
CK, S m a rtC a rd as AF
AP
B
2
: F
m
a
x
=4
8
/
72 M
H
z
NVIC
S PI1
MO S I,MI S O,
S CK,N SS as AF
12 b i t ADC2
IF
IF IF
in terf a ce
@VDDA
S UPERVI S ION
PVD
R s t
Int
@VDD
AHB2
APB2 APB 1
AWU
TAMPER-RTC
@VDD
U S B 2.0 F S
U S BDM/CAN_RX
S y s t em
a i14 3 90d
TRACECLK
TRACED[0:
3 ]
as A S
S W/JTAG
TPIU
Tr a ce/trig
CK, S m a rtC a rd as AF
Figure 2.1: STM32F103xx Performance Line Block Diagram
Lukas Kohler 7