Note:
Pins 1, 3, 13, and 14 belong to the STDC14 footprint and are not accessible with MIPI10 compatible probe.
Note:
4-wire and 5-wire JTAG Debug modes are not supported by default. 4-wire JTAG mode may be used, but may
require to deactivate USB Type-C
®
feature (In hardware and software), to connect JTDI with the SB28 solder
bridge and to disconnect R89.
14.3
CN10 TAG connector
The TAG connector footprint is implemented on the bottom side of B-G474E-DPOW1.
Figure 24.
CN10 TAG connector
To use the TAG connector footprint to debug STM32G474RET6, it is mandatory to place a jumper on JP6 to
connect STLK NRST to GND. This puts the STLINK-V3E MCU in a high impedance state.
In case the user wants to isolate completely the TAG connector from STLINK-V3E MCU, the SW1 mechanical
octal switch must be set accordingly and the JP7 jumper must be removed.
Using the TAG connector is exclusive to using the debug connector.
Table 16.
CN10 TAG connector
Pin
number
Description
Assignment
Pin
number
Description
Assignment
1
VDD
3V3
10
NRST
T_NRST (PG10)
2
SWDIO
T_SWDIO (PA13)
9
NA
-
3
GND
GND
8
NA
-
4
SWCLK
T_SWCLK (PA14)
7
NA
-
5
GND
-
6
SWO
T_SWO (PB3)
14.4
CN9 extension connector
The 32-pin CN9 extension connector is accessible on the left-hand-side on top of the B-G474E-DPOW1, or on the
right-hand-side of its bottom. It provides access to some PIOs of STM32G474RET6 and most of the Discovery
board power supplies. It can be plugged on a breadboard for prototyping (2.54 mm pitch). All pins remain
accessible on the top side for probing.
Table 17.
CN9 extension connector
Pin
number
Description
Main function
Signal assignment
Optional modification
1
5V_I
Power
5V_IN
-
2
GND
Power
GND
-
3
5V_O
Power
5V_OUT
-
4
PA8
RGB LED
BUCK_BLUE_DRIVE
Remove R74
UM2577
CN10 TAG connector
UM2577
-
Rev 2
page 36/54