Stanford Research Systems DS335, Руководство пользователя

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Circuitry 5-1
DS335 Synthesized Function Generator
DS335 Circuit Description
Front Panel (DS3350FP)
The front panel pcb has 8 seven-segment displays, 26 LED indicators, and 22 keys. The displays are
refreshed by a time multiplexing: there are four strobe lines which enable two digits, a column of seven LEDs,
and six keys.
The display refresh is synchronized by the Real-Time Interrupt (RTI). The RTI occurs at a 500 Hz rate. The
display refresh is the first task in the RTI routine, so as to avoid display flicker. Five RTI's are required to
refresh the entire display: four to refresh all of the displays and indicators and to look for key contacts, and a
fifth to intensify a particular digit in the eight digit display.
Each LED and display has a 1:5 duty cycle. When intensified, the selected display will have a 2:5 duty cycle,
making that digit twice as bright. The intensity of the selected digit will blink between 1:5 and 2:5 duty cycle at
a 1 Hz rate.
Microprocessor (DS335M1)
The CPU is a CMOS Z80 (TMPZ84C00AP, U100) clocked at 5 MHz. The CPU's 64k memory space is divided
in two: the lower 32k is occupied by a CMOS ROM (27256, U104), the top 32k has a battery backed-up
CMOS RAM (HM62256LP, U105).
All other devices in the system are mapped as I/O. I/O port strobes (active low) are provided by the 1:16
decoder (74HC154, U108). Port strobes are separated by eight addresses, leaving room to access registers
within particular devices.
Address/Name/Definition
00 -CS_8253 CS to RD or WR to 8253 triple counter/timer
08 -LED_STB WR to assert display strobe and speaker enable
10 -LED_EVEN WR for segment enables for EVEN display digits
18 -LED_ODD WR for segment enables for ODD display digits
20 -LED_LAMP WR for LED indicator enables
28 -KEY_RD RD to read keypad matrix
30 -DAC_MPX WR to select channel for system DAC (and 4 LSB's)
38 -DAC_STB WR for 8 MSB's to 12 bit system DAC
40 -RLY_CTL WR to set position of 7 system relays
48 -ASIC_CTL WR to set state of ASIC control lines
50 -ASIC_WR WR to strobe opcodes and data into ASIC
58 -MOD_RAM CS to RD or WR to modulation RAM
60 -CMD_STB Command strobe to GPIB/RS232 interface
68 DATA_CLK Serial data clock to RD/WR to interface
70 -MISC_IN RD eight bit port of miscellaneous inputs
78 -MISC_OUT WR eight bit port of miscellaneous outputs
Timing
A 10 MHz crystal oscillator is the source of all timing. This oscillator is on page DS335M5, close to the
waveform DAC. For the DDS to work well, it is imperative that this clock be kept clean: hence the oscillator is
operated from a separate supply (+5_CLOCK) and its output is passed directly to the waveform DAC. The 10
MHz is buffered to provide clocks to the rest of the system.