150
M2i.30xx / M2i.30xx-exp Manual
Option Digital inputs
Option Digital inputs
This option allows the user to acquire additional digital channels synchronous and phase stable along with the analog data.
Sample format
The 12 bit A/D samples are stored in two’s complement in the lower 12 bit of the 16 bit data word. 12 bit resolution means that data is
ranging from -2048…to…+2047. In standard mode the upper four bits contain the sign extension allowing to directly use the read data as
16 bit integer values. If digital inputs are activated these inputs are stored in the four upper bits. If overrange detection is activated the highest
bit is used to store the overrange information.
Converting ADC samples to voltage values
The Spectrum driver also contains a register that holds the value of the decimal value of the full scale representation of the installed ADC. This
value should be used when converting ADC values (in LSB) into real-world voltage values, because this register also automatically takes any
specialities into account, such as slightly reduced ADC resolution with reserved codes for gain/offset compensation.
In case of a board that uses an 8 bit ADC that provides the full ADC code (with-
out reserving any bits) the returned value would be 128. The the peak value for
a ±1.0 V input range would be 1.0 V (or 1000 mv).
A returned sample value of for e49 (decimal, two’s complement,
signed representation) would then convert to:
A returned sample value of for example -55 (decimal) would then convert to:
When converting samples that contain any additional data such as for example additional digital channels
or overrange bits, this extra information must be first masked out and a proper sign-extension must be per-
formed, before these values can be used as a signed two’s complement value for above formulas.
Specialities when using interlace mode
If you use the option digital inputs in combination with the interlace mode (see standard mode data organization section for details) digital
samples of the internally connected channels (channel 0 and channel 1 on a M2i.30x5 or channel 0 and channel 2 on a M2i. 30x6) are
sampled alternately with half of the sampling rate. To get four digital bits sampled with the full sampling rate it is necessary to connect the
digital bits of the two used channels externally.
To enable the recording of the digital inputs you simply have to set the according register shown in the table below.
Bit
Standard Mode
Digital inputs (option)
enabled
Overrange enabled
Overrange and digital
inputs (option) enabled
D15
ADx Bit 11 (MSB)
Digital bit 3 of channel x
Overrange of channel x
Overrange of channel x
D14
ADx Bit 11 (MSB)
Digital bit 2 of channel x
ADx Bit 11 (MSB)
Digital bit 2 of channel x
D13
ADx Bit 11 (MSB)
Digital bit 1 of channel x
ADx Bit 11 (MSB)
Digital bit 1 of channel x
D12
ADx Bit 11 (MSB)
Digital bit 0 of channel x
ADx Bit 11 (MSB)
Digital bit 0 of channel x
D11
ADx Bit 11 (MSB)
ADx Bit 11 (MSB)
ADx Bit 11 (MSB)
ADx Bit 11 (MSB)
D10
ADx Bit 10
ADx Bit 10
ADx Bit 10
ADx Bit 10
D9
ADx Bit 9
ADx Bit 9
ADx Bit 9
ADx Bit 9
D8
ADx Bit 8
ADx Bit 8
ADx Bit 8
ADx Bit 8
D7
ADx Bit 7
ADx Bit 7
ADx Bit 7
ADx Bit 7
D6
ADx Bit 6
ADx Bit 6
ADx Bit 6
ADx Bit 6
D5
ADx Bit 5
ADx Bit 5
ADx Bit 5
ADx Bit 5
D4
ADx Bit 4
ADx Bit 4
ADx Bit 4
ADx Bit 4
D3
ADx Bit 3
ADx Bit 3
ADx Bit 3
ADx Bit 3
D2
ADx Bit 2
ADx Bit 2
ADx Bit 2
ADx Bit 2
D1
ADx Bit 1
ADx Bit 1
ADx Bit 1
ADx Bit 1
D0
ADx Bit 0 (LSB)
ADx Bit 0 (LSB)
ADx Bit 0 (LSB)
ADx Bit 0 (LSB)
Register
Value
Direction
Description
SPC_MIINST_MAXADCVALUE
1126
read
Contains the decimal code (in LSB) of the ADC full scale value.
Register
Value
Direction
Description
SPC_READDIGITAL
110100
read/write
Enables the recording of the digital inputs. This is only possible if the option “digital inputs“ is
installed on the board.
V
in
49 1000 mV
128
----------------------------------------------
×
382.81 mV
=
=
V
in
55
–
1000 mV
128
----------------------------------------------
×
429.69 mV
–
=
=