Timestamps
Reading out the timestamps
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To synchronize the external reference clock signal with the PC clock it is possible to perform a timestamp reset command which waits a spec-
ified time for the occurrence of the external clock edge. As soon as the clock edge is found the function stores the current PC time and date
which can be used to get the absolute time. As the timestamp reference clock can also be used with other clocks that don’t need to be syn-
chronized with the PC clock the waiting time can be programmed using the SPC_TIMESTAMP_TIMEOUT register.
Example for initialization of timestamp reference clock and synchronization of a seconds signal with the PC clock:
Reading out the timestamps
General
The timestamps are stored in an extra FIFO that is located in hardware on the card. This extra FIFO can read out timestamps using DMA
transfer similar to the DMA transfer of the main sample data DMA transfer. The card has two completely independent busmaster DMA engines
in hardware allowing the simultaneous transfer of both timestamp and sample data.
As seen in the picture the extra FIFO is holding ABA and timestamp data as the same time. Nevertheless it is not necessary to care for the
shared FIFO as the extra FIFO data is splitted inside the driver in the both data parts.
The only part that is similar for both kinds of data transfer is the handling of the DMA engine. This is similar to the main sample data transfer
engine. Therefore additional information can be found in the chapter explaining the main data transfer.
Commands and Status information for extra transfer buffers.
As explained above the data transfer is performed with the same command and status registers like the card control and sample data transfer.
It is possible to send commands for card control, data transfer and extra FIFO data transfer at the same time
SPC_TSMODE_STANDARD
2h
Standard mode, counter is reset by explicit reset command.
SPC_TSMODE_STARTRESET
4h
Counter is reset on every card start, all timestamps are in relation to card start.
SPC_TSCNT_REFCLOCKPOS
200h
Counter is split, upper part is running with external reference clock positive edge, lower part is running with sampling
clock
SPC_TSCNT_REFCLOCKNEG
400h
Counter is split, upper part is running with external reference clock negative edge, lower part is running with sam-
pling clock
spcm_dwSetParam_i32 (hDrv, SPC_TIMESTAMP_CMD, SPC_TSMODE_STANDARD | SPC_TSCNT_REFCLOCKPOS);
spcm_dwSetParam_i32 (hDrv, SPC_TIMESTAMP_TIMEOUT, 1500);
if (ERR_TIMEOUT == spcm_dwSetParam_i32 (hDrv, SPC_TIMESTAMP_CMD, SPC_TS_RESET))
printf ("Synchronization with external clock signal failed\n");
// now we read out the stored synchronization clock and date
int32 lSyncDate, lSyncTime;
spcm_dwGetParam_i32 (hDrv, SPC_TIMESTAMP_STARTDATE, &lSyncDate);
spcm_dwGetParam_i32 (hDrv, SPC_TIMESTAMP_STARTTIME, &lSyncTime);
// and print the start date and time information (European format: day.month.year hour:minutes:seconds)
printf ("Start date: %02d.%02d.%04d\n", lSyncDate & 0xff, (lSyncDate >> 8) & 0xff, (lSyncData >> 16) & 0xffff);
printf ("Start time: %02d:%02d:%02d\n", (lSyncTime >> 16) & 0xff, (lSyncTime >> 8) & 0xff, lSyncTime & 0xff);
Register
Value
Direction
Description
SPC_M2CMD
100
write only
Executes a command for the card or data transfer
M2CMD_EXTRA_STARTDMA
100000h
Starts the DMA transfer for an already defined buffer.
M2CMD_EXTRA_WAITDMA
200000h
Waits until the data transfer has ended or until at least the amount of bytes defined by notify size are available. This
wait function also takes the timeout parameter into account.
