Sony VPL-PX41, Руководство по обслуживанию

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A B C D E F G H
6-15
VPL-PX41
6-15
C C C C
C (12/19) 74VHC00MTCX (IC653)
3 2 1
1A 1B
4
2A
5
2B
6
2Y
7
GND 1Y
12 13 14
VCC 4B
11
4Y
10
3B
9 8
3A 3Y 4A
C (7/19, 17/19, 19//19)
74VHC221AMTCX (IC406, IC902, IC981)
3 2 1 4 5 6 7
12 13 14
VCC 1R
D
/C
X
11
1Q
10
2Q
9
8
2CLR 2B 1C
X
15 16
Q
Q
CLR
Q
Q
CLR
2A
GND 2R
D
/C
X
2Q 1Q 1CLR 1B 2C
X
1A
C (8/19) AD9888XS-170 (IC451)
R IN 0
R IN 1 8
5
CKEXT
FILT
54
50
COAST 53
CLAMP 30
CKINV 29
SERIAL REGISTER
AND
POWER MANAGEMENT
DATACK
DRA7-0
DRB7-0
DGA7-0
DGB7-0
DBA7-0
DBB7-0
123
8
REF
BYPASS
2
9
24
SYNC
PROCESSING
AND
CLOCK
GENERATION
2:1
MUX
CLAMP
A/D
8
8
113
120
103
110
G IN 0
G IN 1 17
13
8
2:1
MUX
CLAMP A/D
8
8
90
97
80
87
B IN 0
B IN 1 23
20 8
2:1
MUX
HSYNC0
HSYNC1 43
45
2:1
MUX
VSYNC0
VSYNC1 42
44
2:1
MUX
SDA
A0
31
33
SCL 32
SOGIN0
SOGIN1 16
12 2:1
MUX
REF
CLAMP
A/D
8
8
2
70
77
57
64
HSOUT 125
VSOUT
127
SOGOUT
RMIDSCV
BMIDSCV
126
DATACKB
VD:1,6,7,10,14,18,21,25,26,34,37,38,39
VDD:56,69,79,89,98,102,112,122
PVD:47,48,52
GND:3,4,11,15,19,22,27,28,35,36,40,41,
46,49,51,55,65,66,67,68,78,88,99,
100,101,111,121,128
124
C (14/19, 15/19, 16/19) CXA7000R-T6 (IC751, IC801, IC851)
D_IN9
SH_OUT6
SH_OUT5
SH_OUT4
SH_OUT3
SH_OUT2 D_IN8
D_IN7
D_IN6
D_IN5
D_IN4
D_IN3
D_IN2
D_IN1
D_IN0 NC
NC
NC
STATUS
GND
PV
CC
SL_D
A
T
DIRC F/H_CNT VREF_O VREF_I V
DD
5
PS PRG SID_L
V
PRG_L
V
SID_OUT V
CC
15
VCOM_OFST VCOM_OUT
GND GND
FRP
SHST
SHTEST
SIG.C
SIG_OFST
DCFBOFF
GND
GND
MCLK
MCLKX
PGND
GND
GND GND
NC
CAL_L
CAL_H
SH_OUT1
PV
CC
NC
TEST
PGND
GND
POSCNT3 POSCNT2 POSCNT1 POSCNT0
Vref Gen.
SID_Gen.
TG
FRP
CAL_PLS
VCOM_Gen.
D/A
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
Offset Cancel Control
Line inv.
Offset Cancel
Line inv.
Offset Cancel
Line inv.
Offset Cancel
Line inv.
Offset Cancel
Line inv.
Offset Cancel
Line inv.
Offset Cancel
S/H S/H S/H
S/H S/H S/H
S/H S/H S/H
S/H S/H S/H
S/H S/H S/H
S/H S/H S/H
C (7/19) GS1881-CTA (IC401)
V
CC
8
ODD/EVEN
OUT
7
R SET
6
BACK PORCH
OUT
5
C SYNC OUT
1
VIDEO IN
2
V SYNC OUT
3
GND
4
V SLICE
V CLAMP
C SYNC
NOSYNC
VOLTAGE
REGULATOR
V
CC
85
BACK PORCH
DETECTOR
D
CLK( )
Q
Q
TIMING
CURRENT
12V
VERTICAL
DETECTOR
HORIZONTAL
D
G
Q D
CLK
Q
Q
WINDOW
CIRCUIT
11
Q
C (12/19) ICS332-SX1738 (IC659)
OTP
ROM
WITH PLL
DIVIDER
VALUES
CRYSTAL
OSCILLATOR
PLL
CLOCK
SYNTHESIS
AND CONTROL
CIRCUITRY
OUTPUT
BUFFER
OUTPUT
BUFFER
5
4
7
8
1
6
2
3
V
DD
GND PDTS
(BOTH OUTPUTS AND PLL)
SEL
X1/ICLK
X2
CLK2
CLK1
C (7/19) M52347FP-TE (IC405)
1
20
2
19
3
18
4
17
5
16
6
15
7
14
8
13
9
12
10
11
CLAMP
GEN
EDGE
SW
LOGIC
LOGIC
SYNC
SEP
V. SYNC
SEP
V TIME
GATE
V
DET
V
SHAPE
H
DET
H
SHAPE
V S/S
IN
V S/S
OUT
VD+
OUT HD+
OUT CLAMP+
OUT
CLAMP+
TIMING
CLAMP
SW
V
CC
HD–
OUT
V. POL
V. STATE H. STATE
H. POL
GND GREEN
IN
V IN V DET V TIME GATE
SW
COMP/H
IN
COMP/H
DET
C (12/19, 19/19) SN74LV125APWR
(IC656, IC657, IC985, IC988)
1
2
3
1A
1Y
1 OE
4
5
6
2A
2Y
2 OE
7
GND
10
9
8
3A
3Y
3 OE
13
12
11
4A
4Y
4 OE
14 VCC