3-1
SSC-DC132P/134/134P/138P
Section 3
Operating Description
3-1. BI-149 Board
The signal output (IC201 pin 8) from the CCD imager
(IC201) passes through the buffer (Q201), and it is output
to the DCP-33 board from CN201 pin 12.
H1, H2, and V1, V2, V3, V4 pulses are CCD drive pulses
supplied from the DCP-33 board.
3-2. DCP-33 Board
(1) Main Signal Processing Circuit
The CCD-OUT signal (CN301 pin 12) from the BI-149
board is input to IC301 pins 25 and 26, then it is subjected
to the correlative double sampling (CDS), and further it is
amplified in the AGC circuit and output from the pin 8.
Then, it is input to the IC302 pin 39, and A/D conversion
is executed.
Higher-order 9 bits of A/D output (IC302 pins 2-5, 8-12)
are input to the DSP CORE signal processing circuit
(IC311 pins 83-91).
After digital signal processing, D/A conversion is execut-
ed, and analog Y and C output signals are attained (IC311
pin 23: Y, pin 20: C).
These Y and C signals pass through the filters respectively
(FL302,DL301: Y, FL301: C), then they are added, passed
through Q307 and 75
Z
driver (CN316), and output from
CN303 pin 1.
(2) Microprocessor Periphery Circuit
The microcomputer (IC315) sets all parameters for digital
signal processing circuit (in IC311), and saves some data
in the EEPROM (IC314).
Also, it makes a digital control of analog control data
through D/A converter (IC312).
(3) CCD Drive Pulse Signal Circuit
Receiving main clock of 28 MHz, the timing generator
(IC304) generates the CCD drive pulses and the pulses for
sample hold.
Of these pulses, the CCD vertical transfer pulses are fed to
the CCD via IC303 driver.
Also, a synchronizing signal necessary for the timing
generator is got from the SYNC signal generator in the
IC311.
(4) VCO for External Synchronization
(SSC-DC134/134P/138P)
Peripheral circuit of IC308 and D304 is a 28 MHz voltage-
controlled oscillator (VCO) that operates at external
synchronization.
3-3. FC-85 Board
(1) CCD-IRIS Circuit
IC609 to IC612 and Q605 to Q606 generate the 1-field
period ramp wave. The PWM output used for controlling
the shutter speed output from the microprocessor of the
DCP-33 board is passed through the LPF and smoothed.
The two are compared and the SWND signal with a pulse
width corresponding to the subject illuminance is generat-
ed. After this, the electric-charge sweep pulse is extracted
for the SWND pulse width from the XSUB pulse in IC614
and IC615, and output to IC303 of the DCP-33 board.
As these circuits operate on 5.0 V, they can be converted
from 3.3 Vp-p to 5.5 Vp-p by passing the required pulse
through IC604.
(2) External SYNC Circuit
<LL> (SSC-DC134/134P/138P)
The V.PULSE created from the power supply is input to
the monostable multivibrator (IC608) from CN603 Pin 6.
The pulse width-varied signal is according to the variable
resistance for the phase adjustment on the rear panel. The
line lock V-PULSE is input to the Pin 14 of the phase
comparator IC606.
After phase-comparison of the two signals in IC606, the
results are output from Pin 13, and the signals are
smoothed by LPF to become the oscillation frequency
control voltage of the VCO of the DCP-33 board.
(3) Auto Iris DC Servo Circuit
The drive signal (CN601 pin 3) of the lens is controlled by
the microprocessor according to the subject illuminance.
(4) 3.3V Generation Circuit
(SSC-DC134/134P/138P)
The IC616, Q602, Q608 periphery circuits generate 3.3 V
from 5.0 V.
