77
MXD-D400
•
MAIN BOARD IC6 M30624MGA-B20FP (SYSTEM CONTROLLER, CD MECHANISM CONTROLLER)
Pin No.
Pin Name
I/O
Description
1
DRVDAT
O
Command data output to the FL/LED driver
2
DRVCLK
O
Command data transfer clock signal output to the FL/LED driver
3
DRVCS
O
Command data transfer request signal output to the FL/LED driver
4
SIRCS
I
Remote control signal input from the remote control receiver
5
MP3DOUT
O
Command data output to the MP3 decoder
6
MP3DIN
I
Command data input from the MP3 decoder
7
MP3CLK
O
Command data transfer clock signal output to the MP3 decoder
8
BYTE
I
External data bus line byte selection signal input terminal
“L”: 16 bit, “H”: 8 bit (fixed at “L”)
9
CNVSS
—
Ground terminal
10
MP3ACK
O
Acknowledge signal output to the MP3 decoder
11
STB
O
Power on/off relay drive signal output terminal “L”: standby, “H”: power on
12
RESET
I
System reset signal input from the reset signal generator “L”: reset
For several hundreds msec. after the power supply rises, “L” is input, then it changes to “H”
13
X-OUT
O
System clock output terminal (16 MHz)
14
VSS
—
Ground terminal
15
X-IN
I
System clock input terminal (16 MHz)
16
VCC
—
Power supply terminal (+5V)
17
NMI
I
Non-maskable interrupt input terminal “L” active (fixed at “H” in this set)
18
MP3REQ
I
Command data request signal input from the MP3 decoder
19
MP3RESET
O
System reset signal output to the MP3 decoder
20
SCOR
I
Subcode sync (S0+S1) detection signal input from the CD DSP “H”: active
21
MP3SEL
I
Command selection signal output terminal Not used
22
MP3CS
O
Chip enable signal output to the MP3 decoder
23
MP3LP
O
Latch pulse signal output to the MP3 decoder
24
PWM3
O
PWM signal output for RF offset adjustment
25
X4
O
Disc speed selection (normal/4 speed) signal output to the selector IC
26
PWM2
O
PWM signal output for tracking offset adjustment
27
CTRL1
O
Disc speed selection (normal/2 speed) signal output to the selector IC
28
PWM1
O
PWM signal output for focus offset adjustment
29
IICCLK
I/O
IIC data transfer clock signal output to the MD mechanism controller
30
IICDATA
I/O
IIC data bus with the MD mechanism controller
31
TXD1
O
Not used
32
SUBQ
I
Subcode Q data input from the CD DSP
33
SQCLK
O
Subcode Q data reading clock signal output to the CD block “L”: active
34
SENSE
I
Internal status (SENSE) input from the CD DSP
35
DATA
O
Command serial data output to the CD DSP
36
OPEN
—
Not used
37
CLK
O
Command serial data transfer clock signal output to the CD DSP
38
XLT
O
Command latch pulse output to the CD DSP
39, 40
OPEN
—
Not used
41
PULLDOWN
I
Fixed at “L” in this set
42, 43
OPEN
—
Not used
44
BDPWR
O
power control signal output terminal Not used
45
BDRST
O
System reset signal output to the RF amplifier and CD DSP
46
PULLUP
I
Fixed at “H” in this set
