MXD-D400
60
60
6-14. SCHEMATIC DIAGRAM – MAIN(3/4)/LOADING Boards –
•
See page 55 for Waveform.
•
See page 66 for IC Block Diagram.
• Voltages and waveforms are dc with respect to ground
under no-signal (detuned) conditions.
no mark : CD PLAY
[
] : MP3 PLAY
∗
: Impossible to measure
CN4
CN9
CN5
CN3
C22
R8
R11
R13
R56
C84
CN6
C88
C80
C75
C79
R32
R31
R25
R26
R27
R19
R21
R24
C51
C41
C49
C48
R22
R28
R29
R16
C43
R23
R18
C56
R35
R33
RB2
C63
C64
C65
C74
R40
C73
C69
C71
IC8
R41
C97
RB5
D24
R43
C76
C24
C21
L8
C25
L3
L2
L1
X1
R110
R30
IC6
L6
L5
IC10
CN151
M151
S271
S272
CL5
RB1
CL107
CL108
CL109
CL110
CL111
CL105
CL106
CL113
CL112
CL114
CL115
CL116
RB4
C92
C94
R34
R108
R107
R38
R37
R39
C55
9P
17P
25P
8P
0.1
100
100
100
100
0.1
5P
0.1
10000p
0.01
100
16V
10k
10k
2.7k
150k
68k
4.7k
10k
10k
0.1
100
10V
100p
100p
10k
10k
10k
4.7k
0.1
100k
4.7k
0.1
100k
10k
3.3k
0.1
1000p
1000p
0.1
10k
0.1
0.1
100
16V
SN74LV00ANSR
10k
0.1
10k
MA8043-M
(TX)4.3B
100k
0.1
0.1
0.1
0.1
16MHz
10k
100
M30624MGN-B20FP
0
0
LB1641
5P
(CD RST)
10k
(MP3REQ)
(MP3RST)
(MIDIO)
(MIACK)
(MICK)
(MILP)
(MICS)
(DATA)
(XRST)
(XLT)
(CLK)
(LDON)
10k
0.1
0.1
100
10k
10k
10k
10k
10k
100
10V
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
E1
E2
E3
E4
F1
F2
F3
F4
F5
F6
F7
LODP
LODN
SCLK
SENS
DATA
CLK
BDRST
LDON
OUTSW
INSW
LODP
LODN
SQSO
RM
FLCS
FLCLK
FLDT
KEY0
KEY1
KEY2
M
0
M
1
FLRST
LEVELL
LEVELR
IICCLK
IICDATA
RECLEVEL
RESET
CNVSS
RXD1
CLK1
RTS1
TXD1
CNVSS
RESET
RXD1
TXD1
CLK1
RTS
1
RST
INT0
INT1
CLK
CS
DTI
DTO
XLT
MIDIO
MICK
MIACK
MP3REQ
MP3RST
MICS
MILP
SCOR
PWM3
1-4
PWM2
1-2
PWM1
INSW
OUTSW
CODECDOUT_TOMD
MDDOUT
CDDOUT
MICS
MP3REQ
MP3RST
MIDIO
MIACK
MICK
1-4
1-2
PWM3
PWM2
PWM1
BDRST
DATA
XLT
CLK
LDON
SQSO
SENS
SCLK
SCOR
MILP
CD0
CD1
GND
RESET
CNVSS
RXD1
CLK1
RTS1
TXD1
MGND
M+5V
H+5V
MGND
+5V
DOUT
HGND
DADTI
LRCKI
XBCKI
DIN0
DIN1
MCLK
M+5V
D-GND
GND
+3.3V
CODEC
CDM
CDM
CDM
CDM
PANEL
PANEL
PANEL
GND(+5V)
GND(+5V)
MP3
CDM
MP3
MP3
MP3
SCOR
SENS
DATA
CLK
XLT
XRST
PWM1
PWM2
PWM3
LMUTE/MILP
RMUTE/MICS
MP3REQ
MP3RST
SDA/MIDIO
AMUTE/MIACK
SCL/MICK
SUBQ
SQCK
DVDD
DGND2
DGND
RFGND
LDON/RFSW
MP3STB/1-4
RFVDD(3.3V)
MGND(7/8V)
MGND(7/8V)
CD-VM(7/8V)
CD-VM(8V)
TXO
GND/1-2
DOUT
DGND
DGND(EMPTY)
VDD
GND
GND
IN1
P1
OUT1
VCC2
OUT2
P2
VCC1
VZ
IN2
MDJOG1_I
MDJOG0_I
MDRESET_O
LEVELL_I
LEVELR_I
RECLEVEL_I
SELECT0_I
KEY3_I
KEY2_I
KEY1_I
AVSS
VREF
AVCC
OPEN
OPEN
OPEN
KEY0_I
LINEMUTE_AMUTE_O
_O
DRVRST
ADJ_I
_O
CHECK3
PDOWN_
MAINACCUT_I
VCC
VSS
OPEN
OPEN
OPEN
OPEN
CHECK1_O
CDJOG1_I
CDJOG0_I
INSW_I
OUTSW_I
LOADPOS_O
LOADNEG_O
PULLUP
ADADATAI_I
ADADATAO_O
ADADZF_I
ADACLK_O
ADARST_O
ADAINT0_I
ADAINT1_I
CS_ADALAT_O
SCMS
OPEN
OPEN
OPEN
OPEN
AUTOPWRON_I
DATA_O
OPEN
CLK
OPEN
OPEN
XLT_O
BDRST_O
LDON_IO
OPEN
OPEN
OPEN
OPEN
BDPWR_O
SENSE_I/RTS1
SQCLK_O/CLK1
SUBQ_I/RXD1
PULLDOWN
PULLUP
CDMP3SEL
IICDATA
IICCLK
OPEN
/TXD1
VSS
VCC
BYTE
DRVDAT_O
DRVCLK_O
DRVCS_O
SIRCS_I
MP3DOUT_O
MP3DIN_I
MP3CLK_O
STB_O
XOUT
XIN
SCOR_I
PWM3_O
X4_O
PWM2_O
CTRL1_O
PWM1_O
MP3ACK_I
MP3REQ_I
MP3RESET_O
MP3SEL_O
MP3CS_O
MP3LT_O
NMI
CNVSS
RESET
(3/4)
(FOR CHECK)
LOAD-
LOAD+
OUT_SW
IN_SW
SYSTEM CONTROLLER,
CD MECHANISM CONTROLLER
SPDIF BUFFER
MOTOR DRIVE
LOADING
GND
LOAD-
LOAD+
OUT_SW
IN_SW
(LOADING)
(LOADING OUT)
(LOADING IN)
t
t
T
T
13
(Page 51)
(Page 51)
(Page 53)
(Page 58)
(Page 59)
(Page 61)