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116
DVP-CX985V
Pin No.
Pin Name
I/O
Description
84
OVDD
—
Power supply terminal (+3.3V)
85
OVSS
—
Ground terminal (for digital system)
86 to 89
MA0, MA1,
MA6, MA7
O
Address signal output to the SD-RAM
90
OVSS
—
Ground terminal (for digital system)
91
IVSS
—
Ground terminal (for digital system)
92
CVSS
—
Ground terminal (for digital system)
93
OVDD
—
Power supply terminal (+3.3V)
94 to 97
MA8 to MA11
O
Address signal output to the SD-RAM
98
OVDD
—
Power supply terminal (+3.3V)
99
OVSS
—
Ground terminal (for digital system)
100
RAS
O
Row address strobe signal output to the SD-RAM
101
CKE
O
Clock enable signal output terminal Not used
102
CAS
O
Column address strobe signal output to the SD-RAM
103
MCLK
O
Clock signal (54 MHz) output to the SD-RAM
104
WE
O
Write enable signal output to the SD-RAM
105, 106
TEST3, TEST4
I
Input terminal for the test (normally: fixed at “L”)
107
OVSS
—
Ground terminal (for digital system)
108
OVDD
—
Power supply terminal (+3.3V)
109
CVDD
—
Power supply terminal (+2.5V)
110 to 113
MD7 to MD9
I/O
Two-way data bus with the SD-RAM
114
OVDD
—
Power supply terminal (+3.3V)
115
OVSS
—
Ground terminal (for digital system)
116 to 119
MD4, MD5,
MD10, MD11
I/O
Two-way data bus with the SD-RAM
120
OVDD
—
Power supply terminal (+3.3V)
121
OVSS
—
Ground terminal (for digital system)
122 to 125
MD2, MD3,
MD12, MD13
I/O
Two-way data bus with the SD-RAM
126
OVSS
—
Ground terminal (for digital system)
127
CVSS
—
Ground terminal (for digital system)
128
OVDD
—
Power supply terminal (+3.3V)
129 to 132
MD0, MD1,
MD14, MD15
I/O
Two-way data bus with the SD-RAM
133
SLV
I
MPU interface slave address selection signal input terminal Not used
134
CSB
I
MPU interface chip select signal input terminal Not used
135
SDA
I/O
Two-way data bus with the EEPROM, system controller and D/A converter
136
SCL
I
Clock signal input from the system controller
137
SRN
I
Reset signal input from the system controller “L”: reset
138
OVSS
—
Ground terminal (for digital system)
139
CVDD
—
Power supply terminal (+2.5V)
140
PLL_VDD
—
Power supply terminal (+2.5V) (for PLL)
141
CPOUT
O
PLL charge pump output terminal
142
VCOIN
I
PLL external loop filter input terminal
143
PLL_GND
—
Ground terminal (for PLL)
144
IVDD
—
Power supply terminal (+3.3V)