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106
DVP-CX985V
Pin No.
Pin Name
I/O
Description
134 to141
D0 to D7
I/O
Two-way data bus terminal
142
VDD3.3V
—
Power supply terminal (+3.3V) (for digital system)
143, 144
PWM0, PWM1
O
Sled motor drive signal output terminal
145
VSS
—
Ground terminal (for digital system)
146
PWM2
O
PWM signal output terminal
147
DFCT
I
Defect signal input from the RF amplifier
148
MIRR
I
Mirror signal input from the RF amplifier
149
VDD1.8V
—
Power supply terminal (+1.8V) (for digital system)
150
CLKIN
I
Clock signal input from the clock generator
151
VSS
—
Ground terminal (for digital system)
152
TZC
I
Tracking zero crossing signal input from the RF amplifier
153
GIO0/INT2
I
Limit in detect switch input terminal
154
GIO1/INT3
O
Spindle motor drive control signal output terminal
155
GIO2/INT4
O
Thermal shut down signal output to the motor/coil driver
156
GIO3/INT5
I/O
Not used
157
GIO4/PGREF
I/O
Not used
158
GIO5/PGIN
I
Signal detection signal input from the RF amplifier
159
GIO6/SDI
I
Serial data input from the RF amplifier
160
VDD3.3V
—
Power supply terminal (+3.3V) (for digital system)
161
GIO7/SDO
O
Serial data output to the RF amplifier
162
GIO8/SCK
O
Serial clock signal output to the RF amplifier
163
GIO9/FGREF
I/O
Not used
164
GIO10/FGIN
I/O
Not used
165
GIO11/TMC2
O
Interruption control signal output to the RF amplifier
166
GIO12
I/O
Not used
167
GIO13
O
Serial data enable signal output to the RF amplifier
168
VSS
—
Ground terminal (for digital system)
169
DATA/EMU1
O
Serial data output to the AV decoder
170
BCLK/EMU1
O
Bit clock signal output to the AV decoder
171
TRST
I
Reset signal input from the interface controller
172
TMS
I
Mode selection signal input terminal
173
TDI
I
Serial data input from the mechanism controller
174
TCK
I
Clock signal input terminal
175
LRCK/TDO
O
L/R sampling clock signal output to the AV decoder and serial data output to the DSD decoder
176
VDD1.8V
—
Power supply terminal (+1.8V) (for digital system)