Sony AIT-SDX470, Руководство по техническим характеристикам продукции

Страница: 39 / 192

5. Serial ATA Interface
SONY AIT-1 Turbo drive SDX-470V series Ver.1.0 5-1
5. Serial ATA Interface
5.1. Introduction
The SONY SDX-470V Serial ATA TAPE DRIVE uses the Serial ATA Interface to connect to the host system.
Though Serial ATA will not be able to directly interface with legacy Ultra ATA hardware, it is fully compliant with the
ATA protocol and thus is software compatible.
The Introduction provides general, high-level information. For the hardware description and the installation
requirements, see section 2.
5.2. Overview of Interface
Serial ATA is a high-speed serial link replacement for the parallel ATA attachment of mass storage devices. The
serial link employed is a high-speed differential layer that utilizes Gigabit technology and 8b/10b encoding.
Emulation of parallel ATA device behavior as perceived by the host BIOS or software driver, is a cooperative effort
between the device and the Serial ATA host adapter hardware. The behavior of Command and Control Block
registers, PIO and DMA data transfers, resets, and interrupts are all emulated.
The host adapter contains a set of registers that shadow the contents of the traditional device registers, referred to
as the Shadow Register Block. All Serial ATA devices behave like Device 0 devices. Devices shall ignore the DEV
bit in the Device/Head field of received Register FIS’s, and it is the responsibility of the host adapter to gate
transmission of Register FIS’s to devices, as appropriate, based on the value of the DEV bit.
The host adapter may present a Master-only emulation to host software, that is, each device is a Device 0, and
each Device 0 is accessed at a different set of host bus addresses. The host adapter may optionally present a
Master/Slave emulation to host software, that is, two devices on two separate Serial ATA ports are represented to
host software as a Device 0 and a Device 1 accessed at the same set of host bus addresses.
Data is transferred in Serial either to or from host memory to the device’s buffer under the direction of commands
previously transferred from the host. The device performs all of the operations necessary to properly write data to,
or read data from, the media. Data read from the media is stored in the device’s buffer pending transfer to the host
memory and data is transferred from the host memory to the device’s buffer to be written to the media.
5.2.1. Device Registers
The Command Block registers are used for sending commands to the device or posting status from the device.
These registers include the Cylinder High, Cylinder Low, Device/Head, Sector Count, Sector Number, Command,
Status, Features, Error, and Data registers. The Control Block registers are used for device control and to post an
alternate status. These registers include the Device Control and Alternate Status registers.
Alternate Status register
This register contains the same information as the Status register in the command block.