High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9312
425
Revision 1.4 (08-19-08)
DATASHEET
14.5.4.14
Buffer Manager Port 0 Egress Rate Priority Queue 0/1 Register (BM_EGRSS_RATE_00_01)
This register, along with the
Buffer Manager Configuration Register (BM_CFG)
, is used to configure
the egress rate pacing.
Register #:
1C0Dh
Size:
32 bits
BITS
DESCRIPTION
TYPE
DEFAULT
31:26
RESERVED
RO
-
25:13
Egress Rate Port 0 Priority Queue 1
These bits specify the egress data rate for the Port 0(Host MAC) priority
queue 1. The rate is specified in time per byte. The time is this value plus
1 times 20nS.
R/W
00000h
12:0
Egress Rate Port 0 Priority Queue 0
These bits specify the egress data rate for the Port 0(Host MAC) priority
queue 0. The rate is specified in time per byte. The time is this value plus
1 times 20nS.
R/W
00000h