Smart Machine Smart Decision
SIM5360_Hardware Design_V1.06
2016-11-17
47
T(suauxdin)
AUX_PCM_IN setup time before falling edge
of AUX_PCM_CLK
70
–
–
ns
T(hauxdin)
AUX_PCM_IN hold time after falling edge of
AUX_PCM_CLK
20
–
–
ns
T(pauxdout)
Delay from AUX_PCM_CLK rising to
AUX_PCM_OUT valid
–
–
50
ns
*Note: T(auxclk) = 1/(128 KHz).
Primary PCM (2048 KHz PCM clock)
SIM5360 also supports 2.048 MHz PCM data and sync timing for
υ
-law codec. This is called the primary
PCM interface. User can use AT command to take the mode you want as discussed above.
Figure 32: Synchrony timing
Figure 33: EXT CODEC to MODULE timing
SIMCOM
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