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78
Rev. 0.7
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Figure 59. Standards Packet Reception with Low Duty Cycle Flowchart
10.17. Long Packet Transmission
Applications requiring packet length greater than the TX/RX FIFO sizes (64 bytes) may use the long packet feature
of the radio. In such a case, TX FIFO Almost Empty interrupt should be monitored for proper timing to fill the TX
FIFO. To determine when the Almost Empty interrupt should actually occur, a threshold level can be set. As for the
TX side of the link, the TX FIFO Almost Empty and Packet Sent interrupts has to be enabled during initialization.
Upon a button push, the first 64 bytes are filled into the TX FIFO and the host MCU starts waiting for a TX FIFO
Almost Empty interrupt. When the interrupt arrives, the host MCU starts and fills TX_THRESHOLD number of
bytes into the FIFO, and then goes back to the state in which it is waiting for the next TX FIFO Almost Empty IT,
and so on. If the remaining bytes are less than the TX_THRESHOLD, they are put into the FIFO and the host MCU
waits for the packet sent interrupts.
Содержание EZRADIOPRO Si4060
Страница 24: ...AN633 24 Rev 0 7 Figure 20 Supply Current versus Time Diagram from Shutdown to RX State...
Страница 67: ...AN633 Rev 0 7 67 Figure 48 Variable Length Packet Reception Flowchart...
Страница 69: ...AN633 Rev 0 7 69 Figure 50 Packet Matching Reception Flowchart...
Страница 73: ...AN633 Rev 0 7 73 Figure 54 Packet Reception with Automatic RX Hopping Flowchart...
Страница 75: ...AN633 Rev 0 7 75 Figure 56 Packet Reception with Manual Rx Hopping...
Страница 80: ...AN633 80 Rev 0 7 Figure 62 Long Packet Transmission Workflow...
Страница 81: ...AN633 Rev 0 7 81 Figure 63 Long Packet RX Flowchart...
