Programming Actions and Conditions
S7-GRAPH for S7-300/400 Programming Sequential Control Systems
C79000-G7076-C526-01
7-21
7.8
FBD Elements for Programming Conditions
FBD Elements
An FBD program follows the signal flow of a logic string. The individual FBD
elements carry binary information: Signal state "0" (current not flowing) or "1"
(current flowing).
FBD Element
Address
Data type
Memory
Area
Description
AND operation
<Address>
<Address>
&
<address>
BOOL
I, Q, M, T,
C, D, L
The instruction provides the signal
"1" when the signal state of all
<addresses> is "1". If the signal
state of an <address> is "0", the
instruction produces the result "0".
The address specifies the bit whose
signal state is queried.
OR operation
<Address>
<Address>
>=1
<address>
BOOL
I, Q, M, T,
C, D, L
The instruction provides the signal
"1" when the signal state of one of
the <addresses> is "1". If the signal
state of all <address> is "0", the
instruction produces the result "0".
The address specifies the bit whose
signal state is queried.
Insert binary input
<Address>
<address>
BOOL
I, Q, M, T,
C, D, L
The instruction adds a further
binary input to an AND or OR box
after the position selected.
The address specifies the bit whose
signal state is queried.
Negate binary input
None:
--
--
The instruction negates the result of
logic operation (RLO).
Compare box
IN1
IN2
CMP
== I
IN1: First
comparison
value
INT/ DINT/
REAL
I, Q, M, D, L,
constant
The result of the logic operation has
the signal state "1" when the
comparison between the two
addresses IN1 and IN2 is true.
INT: 16-bit integer comparison :
Parameter words
DINT: 32-bit integer comparison :
Parameter double words
REAL: 32-bit floating-point number
comparison
Parameter: double words