Sharp GX-CD5100W, Руководство по обслуживанию

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GX-CD5100W
8 – 1
CHAPTER 8. OTHERS
[1] Function Table of IC
IC1 VHiLC78690E-1: CD Servo (LC78690E) (1/2)
In this unit, the terminal with asterisk mark (*) is (open) terminal which is not connected to the outside.
Pin No. Terminal Name Input/Output Setting in Reset Function
1 EFMIN Input INPUT RF signal input pin.
2 RFOUT Output UNSTABLE RF signal output pin.
3 LPF Output UNSTABLE RF signal DC level detection. LPF capacitor connection pin.
4 PHLPF Output UNSTABLE LPF capacitor pin for detection problem.
5 AIN Input INPUT A signal input pin.
6 CIN Input INPUT C signal input pin.
7 BIN Input INPUT B signal input pin.
8 DIN Input INPUT D signal input pin.
9 FEC Output UNSTABLE FE signal LPF capacitor connection pin.
10* RFMON Output UNSTABLE Built in analog signal for monitoring LSI pin.
11 VREF Output AVDD/2 VREF voltage output pin.
12 JITTC Output UNSTABLE Jitter detection capacitor connection pin.
13 EIN Input INPUT E signal input pin.
14 FIN Input INPUT F signal input pin.
15 TEC Output UNSTABLE TE signal LPF capacitor connection pin.
16 TE Output UNSTABLE TE signal output pin.
17 TEIN Input INPUT TES signal generation TE signal input pin.
18 LDD Output UNSTABLE Laser power control signal output pin.
19 LDS Input INPUT Laser power control signal input pin.
20 AVSS — — Analog GND pin. This pin must always be connected to 0V.
21 AVDD — — Analog power supply pin.
22 FDO Output AVDD/2 Focus control output pin. D/A converter output.
23 TDO Output AVDD/2 Tracking control output pin. D/A converter output.
24 SLDO Output AVDD/2 SLED control output pin. D/A converter output.
25 SPDO Output AVDD/2 SPINDLE control output pin. D/A converter output.
26 VVSS1 — — For use
by the
EFM
PLL
Circuit Built-in VCO GND pin. This pin must always be connected to 0V.
27 PDOUT1 Output UNSTABLE Phase comparison output pin 1 to control built in VCO.
28 PDOUT0 Output UNSTABLE Phase comparison output pin 0 to control built in VCO.
29 PCKIST Input INPUT Resistor connection pin to set current for PDOUT 0 and 1 output.
30 VVDD1 — — Built_in VCO power supply pin 1.
31* DMUTEB Output L DMUTEB output pin.
32 PUIN Input/Output INPUT PUIN input pin. (built-in pull-up resistor)
33* DEFECT Output L DEFECT signal output pin.
34* FSEQ Output L Detected sync signal output. This signal is high when the sync signal
detected from the EFM signal and the internally generated sync signal
agree.
35* C2F Output L C2 error flag monitor output pin.
36 DVDD — — Digital power supply pin.
37 DVSS — — Digital GND pin. This pin must always be connected to 0V.
38 DVDD1.8 Output H Supply voltage connect to capacitor for digital circuit.
39 VDD3 — — Built-in VCO power supply pin 3.
40 VVSS3 — — Built-in VCO GND pin 3. This pin must always be connected to 0V.
41 DVDD — — Digital power supply pin.
42 DVSS — — Digital GND pin. This pin must always be connected to 0V.
43 CE Input INPUT Micro-
Com-
puter
Inter-
face Chip enable signal input pin.
44 CL Input INPUT Data transfer clock input pin.
45 DI Input INPUT Data input pin.
46 DO Output H Data output pin. (TRI-State Output)
47 RESB Input — Reset input pin for LSI. This pin must set to low briefly after power is
applied.
48 INTB0 Output H Interrupt signal output pin 0. (SERVO Section)
49 INTB1 Output H Interrupt signal output pin 1. (DECODER Section)
50 ICONT2 Input/Output INPUT General Purpose I/O pin 2 Controlled by command from the microproces-
sor. Any of these that are unused must be
either set up as input pin ports and connected
to 0V, or set up as output pin ports and left
open.