Sharp AR-FN3, Руководство по обслуживанию

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Pin
No.
Port
Signal
name
IN/OUT ACTIVE Specification Remarks
69 P63 AS/ OUT H Address strobe signal
70 P64 RD/ OUT L ROM, I/O read signal (read at L)
71 P65 HWR/ OUT L Upper write signal (write at L)
72 P66 LWR/ OUT L Lower write signal (write at L)
73 MD0 MD0 IN Mode setting signal 0 (fixed at H level)
74 MD1 MD1 IN Mode setting signal 1 (fixed at L level)
75 MD2 MD2 IN Mode setting signal 2 (fixed at L level)
76 AVCC AVCC A/D, D/A converter power supply
77 VREF VREF A/D, D/A converter reference voltage
78 P70 JGHP IN H Jogger motor home position signal (home position at H)
79 P71 READY/ IN L Stapler self-priming signal (ready at L)
80 P72 PSHP IN H Pusher motor home position signal (home position at H)
81 P73 STORHP/ IN L
82 P74 STUHP IN H Stapler unit home position signal (home position at H)
83 P75 T2PF/ IN L Tray 2 paper full sensor signal (full at L)
84 P76 N.C ST pressure release home position signal (L: Pressure applied)
85 P77 STND IN L Stapler needle replacement sensor (needle being replaced at L)
86 AVSS GND Power supply (GND)
87 P80 EVRE IN Elevator motor encoder
88 P81 OFHP IN H Off-set tray home position signal (home position at H)
89 P82 EXPCS/ OUT L Expansion I/O chip select signal (select at L)
90 P83 N.C
91 P84 ROMCS/ OUT L ROM chip select signal (select at L)
92 VSS GND Power supply (GND)
93 PA0 STHP/ IN L Stapler home position signal (home position at L)
94 PA1 N.C
95 PA2 N.C
96 PA3 N.C
97 PA4 FMPWM/ OUT L Transport motor control signal (PWM output)
98 PA5 N.C
99 PA6 FMRE IN H Transport motor encoder signal
100 PA7 FMDIR OUT L Transport motor direction control signal (CW at L)
4. Expansion I/O (M66500FP)
A. Outline
The expansion I/O converts data from the CPU into load control
signals and input signals from sensors and switches into data for the
CPU.
The expansion I/O uses the M66500FP.
B. Features
•
I/Os are expandable up to 44 bits
(8-bit I/O port
×
3, 8-bit high-dielectric output port
×
2, 4-bit input
port
×
1)
•
Directly connectable to 12 MHz CPU without weight
•
Writable to output port in input mode
•
Output terminal status can be read from CPU
•
Possible to drive transistor array
•
24 mA high-dielectric output port (16 bits) is incorporated.
•
TTL level terminal at CPU side
•
I/O terminal is CMOS level schmitt trigger input
C. Terminal connection diagram
PB7 PA7 PA6 PA5 PA4 PA3 PA2 PA1 PA0
Vcc
RD
WR
CS
56 PG2 64 PF5 63 PF4 62 PF3 61 PF2 60 PF1 59 PF0 58 GND2 57 PG3 55 PG1 54 PG0 53 PC3 52 PC2
PF6
PF7
Vcc
PE0
PE1
PE2
PE3
PE4
PE5
PE6
PE7
GND3
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PC1
PC0
PC4
PC5
PC6
PC7
D7
D6
D5
D4
D3
D2
D1
D0
A0
A1
A2
RESET
GND1
M66500FP
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
33
34
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AR-FN3
9 – 4 8/19/1999