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17
Pinout and I/O Description
17
3.7
Clock Frequency Reference
The module can use its internal TCXO frequency reference, or can accept an external
frequency reference, bypassing the internal TCXO.
Pin Name
Type
Level
Description
Comment
REF_I
Clk
0.5-1.7Vp-p
Main frequency reference input, DC-decoupled, input capacitance
is 8 pF
See section 3.7.2.
REF_O
Clk
1.2Vp-p
Frequency reference output from the internal TCXO
See section 3.7.1.
2V8_OUT
P,O
2.8V
2.8V supply output for the internal TCXO.
Do not power any external device from
this pin. It is only intented to connect
to 2V8_IN.
2V8_IN
P,I
2.8V
2.8V supply input for the internal TCXO. Typically connected to
2V8_OUT.
VTUNE
I
Reserved
Leave unconnected.
3.7.1
Using the internal TCXO
To have the module run on its own TCXO:
•
REF_I must be connected to REF_O (those pins are next to each other);
•
2V8_IN must be connected to 2V8_OUT (those pins are next to each other). Do not
use another 2.8V supply than the one from the 2V8_OUT pin.
The 10-MHz signal from the internal TCXO is available at the REF_O pin, with peak-to-peak
amplitude of 1.2V. The waveform is illustrated in the oscilloscope screen capture below.
3.7.2
Using and external frequency reference
To use an external frequency reference:
•
2V8_IN must be tied to ground
•
REF_O and 2V8_OUT are not used and should be left unconnected
•
The 10-MHz reference must be fed into the REF_I pin. It is preferably a sine wave
or a band-limited square wave. If CMOS or LVTTL signals are used, it is
recommended to filter them at the source with an RC filter with a pole near 100
MHz. The level at the REF_I input has to be between 0.5 and 1.7 Vp-p. If a higher
signalling voltage is divided with a resistive divider, the impedance level shall be
sufficiently low to avoid excessive level drop because of the filtering of the divider
