Q7-B03
Q7-B03 User Manual - Rev. First Edition: 1.0 - Last Edition: 1.1 - Author: S.B. - Reviewed by G.G. Copyright © 2017 SECO S.r.l.
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3.2.1.6
SD interface signals
The Intel
®
family of SOCs formerly coded as Apollo Lake offers one SD Card controller, able to support SD Card 3.0 interface.
Such an SD controller complies with SD Host Controller Standard Specification version 3.01.
The SD port is externally accessible through the golden edge finger connector, and can work in 1-bit and 4-bit mode.
Signals involved with SD interface are the following:
SDIO_PWR#: SD power enable. Active Low Output signal, electrical level +3.3V_S. This signal can be used on the Carrier board to enable the power line for the
SD card.
SDIO_CD#: Card Detect Input. Active Low Signal, electrical level +3.3V_S with 100k
Ω
pull-up resistor. This signal must be externally pulled low to signal that a SD
Card Device is present.
SDIO_CLK: Clock Line (output), 50MHz maximum frequency for High Speed Mode.
SDIO_CMD: Command/Response line. Bidirectional signal, electrical level +3.3V_S, used to send command from the Host to the connected card, and to send the
response from the card to the Host.
SDIO_WP: Write Protect input, electrical level +3.3V_S with 100k
Ω
pull-up resistor. It is used to communicate the status of Write Protect switch of the external SD
card. Since microSD cards don
’
t manage this signal, it is important that, when designing carrier boards with microSD slots, this signal must be tied to GND,
otherwise the OS will always consider the card as protected from writing.
SDIO_DAT[0÷3]: SD Card data bus. SDIO_DAT0 signal is used for all communication modes. SDIO_DAT[1÷3] signals are required for 4-bit communication mode.
3.2.1.7
Audio interface signals
Q7-B03 module supports HD audio format, thanks to native support offered by the processor to this audio codec standard.
Here following the signals related to HD Audio interface:
HDA_SYNC: HD Audio Serial Bus Synchronization. 48kHz fixed rate output from the module to the Carrier board, electrical level +3.3V_S.
HDA_RST#: HD Audio Codec Reset. Active low signal, output from the module to the Carrier board, electrical level +3.3V_S.
HDA_BCLK: HD Audio Serial Bit Clock signal. 24MHz serial data clock generated by the
HD audio controller, output from the module to the Carrier board,
electrical level +3.3V_S.
HDA_SDO: HD Audio Serial Data Out signal. Output from the module to the Carrier board, electrical level +3.3V_S.
HDA_SDI: HD Audio Serial Data In signal. Input to the module from the Carrier board, electrical level +3.3V_S.
All these signals have to be connected, on the Carrier Board, to an HD Audio Codec. Please refer to the chosen Codec
’
s Reference Design Guide for correct
implementation of audio section on the carrier board.
