Samsung KS57C0302, Руководство пользователя

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KS57C0302 USER'S MANUAL ERRATA
JUNE 1998
3. MEMORY MAP (Page 4-28)
TMOD0
-
Timer/Counter 0 Mode Register F91H, F90H
.6 - .4 Timer/Counter 0 Input Clock Selection Bits
0 0 0 External clock input at TCL0 pin on rising edges
0 0 1 External clock input at TCL0 pin on falling edges
1 0 0
fx/2
10
= 4.09 KHz
1 0 1
fx/2
6
= 65.5 KHz
1 1 0
fx/2
4
= 262 KHz
1 1 1 fx = 4.19 KHz
NOTE : When fx is system clock of 4.19 MHz.
4. POWER-DOWN (Page 8-2)
Table 8-1. Hardware Operation During Power-Down Modes
Operation
Stop Mode (STOP)
(note)
Idle Mode (IDLE)
Clock oscillator Main system clock oscillation stops CPU clock oscillation stops (main and
subsystem clock oscillation continues)
Basic timer Basic timer stops Basic timer operates (with IRQB set at
each reference interval)
Serial I/O interface Operates only if external SCK input is
selected as the serial I/O clock
Operates if a clock other than the CPU
clock is selected as the serial I/O clock
Timer/counter 0 Operates only if TCL0 is selected as the
counter clock Timer/counter 0 operates
Comparator Comparator operation is stopped Comparator operates
Watch timer Watch timer operation is stopped Watch timer operates
External interrupts INT1, INTK are acknowledged INT1, INTK are acknowledged
CPU All CPU operations are disabled All CPU operations are disabled
Power-down mode
release signal Interrupt request signals are enabled by
an interrupt enable flag or by
RESET
input
Interrupt request signals are enabled by
an interrupt enable flag or by
RESET
input
NOTE: STOP mode: when the main clock is selected as the system clock (CPU clock).