The loading process is initiated by the first pulse from the keyer. A red LED in the front panel in-
dicates the working of the clock, which stops automatically at the end of the store resetting it to
its beginning. A message that is too long will be cut off when the maximal storage capacity is
reached. Thus the stored message is protected against an accidental "overloading".
A second message can be stored in the same way by first pressing button "PR2" entering the
text into program 2.
If you want to store one long message, set switch "512/2×256" to "512" and key in the text.
Keyer Circuit Description
ICK1 is a free running generator at twice the dot sequence frequency, which is obtained by divi-
ding the generator frequency with with flip-flop ICK2a. If no lever is pressed, ICK2a is blocked.
Operating one of the lever or both simultaneously starts generator ICK1 and releases dot flip-
flop ICK2a (and dash flip-flop ICK3a if the dash lever is pressed). During a dot sequence the
pulse flow goes from ICK2a via ICK5a and ICK6a to transistor T1. T1 drives transistor T3 with
its relay or keying transistor T2 depending upon the required circuitry. Additionaly ICK6a con-
trols the side-tone generator formed by ICK6b, c, d and T4.
If both levers are pressed simutaneously, ICK3b toggels with each sign (dash or dot) thus alter-
nately blocking and releasing ICK3a. This pauses a continuous dash-dot (or dot-dash) sequen-
ce at the output via ICK5a, ICK5c, ICK6a, ICK5b, ICK5c ICK6a.
Flip-flop ICK2b is reset at the end of the space following the last sign keyed. Generator ICK1
and the two flip-flops ICK2a and ICK3b are blocked. All dashes, dots and spaces are automati-
cally completed, even if the levers are released before completion.
Memory Circuit Description
During the READ and WRITE modes generator ICK1 is set to continuous operation serving as a
clock in the memory circuit.
The two memories ICM2 and ICM4 are adressed by ICM1, a 12-stage binary counter.
The buttons "PR1" and "PR2" prepare the choise of either ICM2 or ICM4 via ICM5b and switch
on the clock via ICM5a in the READ mode. ICM5a is reset by ICM1, the binary counter, at the
end of each reading or writing cycle.
In the WRITE mode the clock is started by the first paddle operation via ICM7a and IC5a, where
as in the READ mode the clock is stopped via ICM8a, ICM8b and ICM5a.
The "CQ" key sets RS-flip-flop ICM7b/ICM7c to block ICM5a. The stored message is read conti-
nuously until stopped by a paddle operation.
The data inputs (13) of the two memories ICM2 and ICM4 receive the information to be stored
from ICK4a on the keyer board.
In READ mode the memories data outputs (12) provide ICK6/5 on the keyer board with the sto-
red information via ICM8c.
Switch "512/2×256" prepares the resetting of ICM5a after 256 or 512 clock pulses. In position
"512" ICM5b toggles after 256 clock pulses to address the two memories in sequential order.
d) Reading a Stored Message
Adjust the speed control for a suitable speed.
Set switch "READ/WRITE" to "READ".
Select the desired program by pressing button "PR1" or "PR2". When the memory is read out
the program automatically stops and returns to its beginning. If the paddle is operated during the
reading process, the program stops immediately and returns to its beginning.
If you want your message to be continuously repeated, press button "CQ" in addition to "PR1" or
"PR2". The selected program will be repeated continuously until the paddle is operated stopping
the program and resetting it to its beginning.
Содержание ETM-4C
Страница 1: ...ETM 4C 2 Speicher Version C MOS Memory keyer...
Страница 7: ......
Страница 8: ......