rtd cpuModules CMA34CR, Руководство пользователя

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BDM-610000083 Rev L Chapter 3: Connecting the cpuModule 37
Serial Port 1 (CN7) and Serial Port 2 (CN8)
Serial Port 1 (COM1) is implemented on connector
CN7
, and Serial Port 2 (COM2) is implemented on connector
CN8
. The serial ports are normally configured as PC compatible full-duplex RS-232 ports, but you may use the
BIOS Setup program to reconfigure these ports as half-duplex RS-422 or full-duplex RS-422 or RS-485. If you
reconfigure the ports, you must also select the I/O address and corresponding interrupt using Setup. Table 18
provides the standard I/O addresses and corresponding interrupts. The serial ports support Auto-RTS, Auto-CTS
and can be set for non-standard baud rates using the multiplier in the BIOS setup.
Serial Port UART
The serial ports are implemented with a 16550/16750-compatible UART (Universal Asynchronous Receiver/
Transmitter). This UART is capable of baud rates up to 115.2 kbaud, and includes a 512-byte FIFO. Refer to any
standard PC-AT hardware reference for the register map of the UART.
Non-Standard Baud Rates
The serial ports are capable of running at higher speeds than the standard 115.2 kbaud. In the BIOS you can
navigate to Advanced -> RTD Advanced Options -> RTD Serial Port control. In this menu you can select different
serial port baud rate multipliers. Each serial port has their own multiplier option and can increase the baud rates
x4, x8, x8.7 for maximum baud rates of 460.8k, 921.6k and 1M respectively. So, for example, to operate a serial
port at 921.6 kbaud, set the multiplier to x8 in the BIOS, and set the port speed to 115.2 kbaud in the software.
FIFO Size
The standard FIFO size for a 16550 UART is 16 bytes. The UARTs for the serial ports actually use a 512 byte FIFO,
although the “full” and “empty” flags emulate the standard size. The UARTs can be placed into 16750 mode by
setting bit 5 of the LCR and FCR, which increases the emulated FIFO size to 64 bytes.
THRE Enhanced Mode
The THRE bit in the LSR register normally is set when the Transmit FIFO is empty, and cleared when the Transmit
FIFO is not empty. There is no indication of when the FIFO is full, so software must keep track of how many bytes
are written to the FIFO. In the BIOS you can navigate to Advanced -> RTD Advanced Options -> RTD Serial Port
control and change the “LSR-THRE Optional Mode” to “Non-Standard.” This causes the THRE bit to be cleared
only when the Transmit FIFO is 64 bytes less than full (or 448 bytes in the FIFO). Software can then keep writing
data until the THRE bit is set, and then write 64 more bytes. For most applications, enabling this bit will result in
more efficient transmitting with no changes to the software.
Table 18 Serial Port Settings
I/O Address (hex) IRQ
03F8 IRQ4
02F8 IRQ3
03E8 IRQ4
02E8 IRQ3