rtd cpuModules CMA34CR, Руководство пользователя

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BDM-610000083 Rev L Chapter 4: Using the cpuModule 69
Reset Status Register
The cpuModule has several different signals on board which can cause a system reset. If a reset occurs, the reset
status register can be used to see which reset or resets have been asserted on the cpuModule.
The user has the ability to see which resets have been asserted. Resets can also be cleared.
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Examine Resets : Reading from I/O port 0xED0 will indicate if a reset has been asserted. If a 1 is read,
the corresponding reset has been asserted. If a 0 is read from the bit, the reset has not been asserted
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Clear Reset : Each reset can be cleared by writing a 1 to the selected bit of I/O port 0xED0.
The bit definitions are as follows:
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b24 Thermal Limit Latched
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b23 Thermal Limit
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b22 PCIe WAKE
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b21 Watchdog Timer Reset
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b20 Thermal Shutdown
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b19 SLP S4#
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b18 SLP S3#
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b17 Utility Power Button
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b16 Utility Reset Button
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b15 PLT Reset
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b14 IMVP Power Good
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b13 PCH Power Good
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b12 Memory termination
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b11 0.85V Switched
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b10 1.05V PCH/PLX
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b9 1.05V CPU
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b8 1.8V
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b7 3.3V Switched
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b6 EPLD Power Good
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b5 Memory Power
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b4 RSM Reset
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b3 1.05V Always
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b2 3.3V Always
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b1 Main 12V Input
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b0 Main 5V Input