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TO-247-4L Half-Bridge Evaluation Board
User’s Guide
©
2019 ROHM Co., Ltd.
No. 61UG047E Rev.001
August.2019
12.4
２
Level Inverter Circuit
２
level inverter circuit based on half bridge configuration is shown in figure 27.
Set the OCP point in advance as the OCP circuit is valid.
Connect the CLK signal from a pulse generator to IN_L_CLK pin (CN201 4pin). Then, connect the 12V power supply (for control
block) to Vcc pin (CN202), and load inductor to Vsw pin (T
２
). Prepare two HVdc power supplies with the same voltage, and
connect them in series, connect the high side to HVdc pin (T1), and low side to the PGND pin (T3). Connect the smoothing capacitor
and AC load to one side of the load inductor and connect its return line between the two serial connected HVdc power supplies.
The switching operation is at HS when AC output is (
＋
) side, at LS when AC output is (
－
) side. The sine wave voltage is
obtained by controlling the CLK signal Duty.
Preliminary setting has to be done for JP1 only.
①
JP1
setting: Set to “Dual/DP” side
②
Directly connect ENABLE signal to SGND
Operation procedure is as follow:
③
Input the +12V power supply
④
Set the switching frequency, duty ratio at the pulse generator, then input the CLK signal.
⑤
Input the HVdc power supply
⑥
Adjust the output current at AC load equipment
Pay attention to the heat generation when increasing the load current, use a sufficient cooling heat sink if necessary.
HS
Gate Driver
HVdc
PGND
Vsw
DUT
DUT
IN_H_CLK
ENABLE
PRIMERY
SECONDERY
BD7F200
Vcc
SNB
HS
Gate Power
PGND
PGND
LS
Gate Driver
Rg
ActiveClamp
LS
Gate Power
Rg
Active Clamp
IN_L_CLK
BM6101
BD7F200
BM6101
AC
Load
+12V
Power Supply
Pulse
Generator
(+5V output)
SGND
Figure 27. 2 Level Inverter Circuit Operation Test
AC
Jumper
setting
Dual / DP
Single
JP1
1
3
JP2
