Page 14 of 25
The Constant Fraction Discriminators CFD8c, CFD7x, CFD4c, CFD1c and CFD1x (11.0.1701.1)
The
Walk level
shall now be adjusted to the input signal DC level by fine-tuning the Z-potentiometer. In theory, optimal
temporal resolution is achieved if the walk level is exactly set to the baseline of the signal, indicated by equal abundance of
“high” and “low” states from noise fluctuation just before the input signal appears.
Under “real” experimental conditions it turns out to be “safer” if the
Walk level
is slightly positive, i.e. so high that the trace
brightness in the “high” state (before the timing transition) begins to disappear (see Figure 3.12b, right picture). This setting is
less likely to produce false “noise triggers” (see “Pre-trigger problem”) and usually does not affect the effective temporal
resolution significantly. This is especially important if the initial
Walk level
adjustment is done at low signal rate but the rate
increases as experimental conditions change (see below).
If the
Walk level
is set too far from the input signal’s baseline (see Figure 3.13b) the time resolution will be less than optimal.
Especially in case of a far too low
Walk level
, the CFD may not work properly at all, while a too high
Walk level
will turn the
CFD more and more into a leading edge discriminator.
Figure 3.13b: Signal traces (as in Figure 3.8b left) with the Walk level
set too low (left picture) and too high (right picture)
3b.3.5
Output signal w idth
The CFD output signal width can be adjusted between 4 ns and 200 ns with the W-potentiometer on the front panel if no
jumper is placed (default) on the “width bridges” of the internal circuit (see Figure 3.5b). With the jumper in place, the
maximum width is increased to 2000 ns. Please contact
RoentDek
if you are in need of the optional jumpers.
Obviously, a small output signal width is necessary for a high pulse-pair resolution (multi-hit operation). The multi-hit dead-
time depends thus on the output signal width but also on the rise time of the input signal and the CFD settings. For optimized
setting and small input signal rise time, the multi-hit dead-time can be as low as 10 ns. It may be, however, that the timing of a
later signal is affected by ringing tails from an earlier particle. In case of very small CFD output signal width it has to be
verified that the follow-up electronics can handle such short signal.
Larger output widths can be beneficial to reduce “false” trigger signals from delayed ringing or reflection signals following the
main input signal (as long as a small pulse-pair dead time is not required). The trailing edge of the output signal can (as the
rising edge) produce time cross talk between channels (see “time cross talk problem”), therefore a variation of the width may
be used to move the trailing edge out of the time range of interest where it could give rise to time cross talk.
3b.4
The Veto option
The c and x series of the
RoentDek
CFD
modules feature a “Veto” and “Gating” (anti-Veto) function. It allows to disable
or enable timing outputs of from the unit as a function of the voltage level on the input socket labelled
Veto
which is switched
between 0 V (“low”) and “high”: -0.8 V (50 Ohm input impedance)
. The logic (enable or disable) can be set by internal
jumpers, individually for each channel. There are three modes of operation:
*
Safe values for “low” are levels between -0.1V and +0.1V, for “high” -0.7V to -1V (on 50 Ohm impedance coax input)
